FM93C66 4096-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Timing Diagrams
SYNCHRONOUS DATA TIMING
CS
t
CSS
t
SKH
t
SKL
t
CSH
SK
t
DIS
DI
t
DIH
Valid
Input
t
PD
DO (Data Read)
t
SV
DO (Status Read)
Valid Status
t
DH
Valid
Output
t
PD
Valid
Output
t
DF
t
DF
Valid
Input
READ CYCLE (READ)
t
CS
CS
SK
DI
1
Star t
Bit
1
0
A7
A6
Address
Bits(8)
A1
A0
Opcode
Bits(2)
DO
High - Z
Dummy
Bit
93C66:
Address bits patter n -> User defined
;;;;;;;;;;;;;;
;;;;;;;;;;;;;;
;;;
;;;
0
D15
D1
D0
WRITE ENABLE CYCLE (WEN)
t
CS
CS
SK
DI
1
Star t
Bit
0
0
A7
A6
Address
Bits(8)
A1
A0
Opcode
Bits(2)
DO
High - Z
93C66:
A d d r e s s b i t s p a t t e r n - > 1 - 1 - x - x - x - x - x - x ; ( x - > D o n ' t C a r e, c a n b e 0 o r 1 )
8
FM93C66 Rev. C.1
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