FM93C66 4096-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Timing Diagrams
(Continued)
WRITE DISABLE CYCLE (WDS)
t
CS
CS
SK
DI
1
Star t
Bit
0
0
A7
A6
Address
Bits(8)
A1
A0
Opcode
Bits(2)
DO
High - Z
93C66:
A d d r e s s b i t s p a t t e r n - > 0 - 0 - x - x - x - x - x - x ; ( x - > D o n ' t C a r e, c a n b e 0 o r 1 )
WRITE CYCLE (WRITE)
t
CS
CS
SK
DI
1
Star t
Bit
0
1
A7
A6
Address
Bits(8)
A1
A0
D15 D14
Data
Bits(16)
D1
D0
t
WP
Ready
Busy
Opcode
Bits(2)
DO
93C66:
Address bits patter n -> User defined
Data bits patter n
-> User defined
High - Z
WRITE ALL CYCLE (WRALL)
t
CS
CS
SK
DI
1
Star t
Bit
0
0
A7
A6
Address
Bits(8)
A1
A0
D15 D14
Data
Bits(16)
D1
D0
t
WP
Ready
Busy
Opcode
Bits(2)
DO
High - Z
93C66:
A d d r e s s b i t s p a t t e r n - > 0 - 1 - x - x - x - x - x - x ; ( x - > D o n ' t C a r e, c a n b e 0 o r 1 )
Data bits pattern
-> User defined
9
FM93C66 Rev. C.1
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