XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
3.4.1
Register Descriptions
TABLE 11: CLOCK
S
ELECT
REGISTER E1 MODE
R
EGISTER 0 - T1/E1 MODE
IT UNCTION
C
LOCK
S
ELECT EGISTER (CSR)
R
HEX ADDRESS: 0X0100
B
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
BPVI
R/W
0
Bipolar Violation Insertion
This bit is used to force a single BPV on the transmit output of Ttip/
Tring upon the transition from “0” to “1”.
0 = Disabled
1 = Insert BPV
6
5
IST1
8kHz
R/W
R/W
1
0
T1/E1 Mode select
This bit is used to program the chip to either T1 or E1 mode.
1 = T1 mode
0 = E1 mode.
8kHZ Sync Enable
This bit allows the user to configure the transmit sectionof the framer
block to synchronize their frame alignment with the 8kHz signal derived
from the MCLKIN input pin.
NOTE: This bit-field is ignored if TxSERCLK or the recovered line clock
is used as the timing reference for the transmit section.
4
CLDET
R/W
0
Clock Loss Detect Enable/Disable Select
This bit enables a protection feature for the Framer whenever the
recovered line clock is used as the timing source for the transmit sec-
tion. If the LIU loses clock recovery, the Clock Distribution Block will
detect this occurrence and automatically begin to use the LIUCLK
derived from MCLKIN as the Transmit source, until the LIU is able to
regain clock recovery.
0 = Disabled
1 = Enabled
3:2 Reserved
1:0 CSS[1:0]
R/W
R/W
0
Reserved
00
Clock Source Select
These bits specify the timing source for the Transmit Framer block.
00 = RxLineClk - The recovered line clock is chosen as the timing refer-
ence for the transmit section of the framer (Loop Timing).
01 = TxSERCLK - The Transmit Serial Input Clock is chosen as the tim-
ing reference for the timing source for the transmit section of the
framer.
10 = LIUCLK - (derived from MCLKIN) is chosen as the timing refer-
ence for the transmit section of the framer.
11 = RxLineClk - The recovered line clock is chosen as the timing refer-
ence for the transmit section of the framer (Loop Timing).
37
EXAR [ EXAR CORPORATION ]
