XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
TABLE 13: GENERAL
P
URPOSE
INPUT/OUTPUT 0 CONTROL
REGISTER
R
EGISTER
IT
2
G
ENERAL
P
URPOSE
I
NPUT/OUTPUT 0 CONTROL
R
EGISTER (GPIOCR)
HEX ADDRESS: 0X0102
B
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
4
GPIO0_0DIR
R/W
0
GPIO0_0 Direction
This bit is used to select pin GPIO0_0 as an input or output.
0 = Input
1 = Output
3
2
1
0
GPIO0_3
R/W
0
0
0
0
GPIO0_3 Control
If GPIO0_3DIR is set to “0”, this bit is a read only register which is used
to report the state of the GPIO0_3 input pin. If GPIO0_3DIR is set to
“1”, this bit is a write only register which is used to determine the output
voltage of the GPIO0_3 pin.
GPIO0_2
GPIO0_1
GPIO0_0
R/W
R/W
R/W
GPIO0_2 Control
If GPIO0_2DIR is set to “0”, this bit is a read only register which is used
to report the state of the GPIO0_2 input pin. If GPIO0_2DIR is set to
“1”, this bit is a write only register which is used to determine the output
voltage of the GPIO0_2 pin.
GPIO0_1 Control
If GPIO0_1DIR is set to “0”, this bit is a read only register which is used
to report the state of the GPIO0_1 input pin. If GPIO0_1DIR is set to
“1”, this bit is a write only register which is used to determine the output
voltage of the GPIO0_1 pin.
GPIO0_0 Control
If GPIO0_0DIR is set to “0”, this bit is a read only register which is used
to report the state of the GPIO0_0 input pin. If GPIO0_0DIR is set to
“1”, this bit is a write only register which is used to determine the output
voltage of the GPIO0_0 pin.
TABLE 14: FRAMING
S
ELECT
R
EGISTER-E1 MODE
R
EGISTER 7- E1 MODE
IT UNCTION
F
RAMING
S
ELECT
R
EGISTER (FSR)
HEX ADDRESS: 0X0107
B
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
E1 MODENB
R/W
0
Annex B Enable
This bit forces the framing synchronizer to be compliant with ITU-T
G.706 Annex B for CRC-to-non-CRC interworking detection.
0 = Normal operation.
1 = Annex B is enabled.
6
E1 CRCDIAG
R/W
0
CRC Diagnostics Select Enable/Disable
This Read/Write bit-field is used to force an errored CRC pattern in
the outbound CRC multiframe to be sent on the transmission line.
The transmit section will implement this error by inverting the value
of CRC bit (C1)
0 = Transmit E1 Framer functions normally (no errors)
1 = Transmits errored CRC bit
NOTE: This bit-field is ignored if CRC multi-Framing is disabled.
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