XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 10: REGISTER SUMMARY
R
EG
#
FUNCTION
S
YMBOL
H
EX
MODE
316- LAPD Buffer 0 Control Register
411
LAPDBCR0
0x0600
to
T1/E1
T1/E1
0x0660
LAPDn Buffer 1 (0x0700 - 0x0760)
412- LAPD Buffer 1 Control Register
507
LAPDBCR1
0x0700
to
0x0760
Performance Monitor
508
509
510
511
512
513
T1/E1 Receive Line Code Violation Counter: MSB
T1/E1 Receive Line Code Violation Counter: LSB
T1/E1 Receive Frame Alignment Error Counter: MSB
T1/E1 Receive Frame Alignment Error Counter: LSB
T1/E1 Receive Severely Errored Frame Counter
T1/E1 RLCVCU
T1/E1 RLCVCL
T1/E1 RFBECU
T1/E1 RFAECL
T1/E1RSEFC
0x0900
0x0901
0x0902
0x0903
0x0904
0x0905
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1 Receive Synchronization Bit (CRC-6 (T1) CRC-4
(E1) Block) Error Counter: MSB
T1/E1 RSBBECU
514
T1/E1 Receive Synchronization Bit (CRC-6 (T1) CRC-4
(E1) Block) Error Counter: LSB
T1/E1 RSBBECL
0x0906
T1/E1
515
516
517
518
519
520
521
522
523
524
525
526
527
T1/E1 Receive Far-End Block Error Counter: MSB
T1/E1 Receive Far-End Block Error Counter: LSB
T1/E1 Receive Slip Counter
T1/E1 RFEBECU
T1/E1 RFEBECL
T1/E1RSC
0x0907
0x0908
0x0909
0x090A
0x090B
0x090C
0x090D
0x090E
0x090F
0x910
T1/E1
E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1
T1/E1 Receive Loss of Frame Counter
T1/E1 Receive Change of Frame Alignment Counter
LAPD Frame Check Sequence Error counter 1
T1/E1 PRBS bit Error Counter: MSB
T1/E1 RLFC
T1/E1 RCOAC
LFCSEC1
T1/E1 PBECU
T1/E1 PBECL
T1/E1TSC
T1/E1 PRBS bit Error Counter: LSB
T1/E1 Transmit Slip Counter
T1/E1 Excessive Zero Violation Counter: MSB
T1/E1 Excessive Zero Violation Counter: LSB
LAPD Frame Check Sequence Error counter 2
LAPD Frame Check Sequence Error counter 3
T1/E1 EZVCU
T1/E1 EZVCL
LFCSEC2
0x911
0x91C
LFCSEC3
0x92C
Interrupt Generation/Enable Register Address Map (0x0B00 - 0x0B41)
528
529
530
Block Interrupt Status Register
Block Interrupt Enable Register
Alarm & Error Interrupt Status Register
BISR
BIER
0x0B00
0x0B01
0x0B02
T1/E1
T1/E1
T1/E1
AEISR
34