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XRT86L30IV 参数 Datasheet PDF下载

XRT86L30IV图片预览
型号: XRT86L30IV
PDF下载: 下载PDF文件 查看货源
内容描述: 单一T1 / E1 / J1成帧器/ LIU COMBO [SINGLE T1/E1/J1 FRAMER/LIU COMBO]
分类和应用:
文件页数/大小: 284 页 / 1793 K
品牌: EXAR [ EXAR CORPORATION ]
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XRT86L30  
REV. 1.0.1  
SINGLE T1/E1/J1 FRAMER/LIU COMBO  
The ANSI T1.403 standard requires that the status of the transmission quality be reported in one-second  
intervals. The one-second timing may be derived from the DS1 signal or from a separate equally accurate  
(±32ppm) source. The phase of the one-second periods does not depend on the time of occurrence of any  
error event. A total of four seconds of information is transmitted so that recovery operations may be initiated in  
case an error corrupts a message. Counts of events shall be accumulated in each contiguous one-second  
interval. At the end of each one-second interval, a modulo-4 counter shall be incremented, and the appropriate  
performance bits shall be set in bytes 5 and 6 in Format A. These octets and the octets that carry the  
performance bits of the preceding three one-second intervals form the periodic performance report.  
The periodic performance report is made up of 14 bytes of data. Bytes 1 to 4, 13, and 14 are the message  
header and bytes 5 to 12 contain data regarding the four most-recent one-second intervals. The periodic  
performance report message uses the SAPI/TEI value of 0x14.  
6.7.3  
Transmission-Error Event  
Occurrences of transmission-error events indicate the quality of transmission. The occurrences that shall be  
detected and reported are:  
CRC Error Event: A CRC-6 error event is the occurrence of a received CRC code that is not identical to the  
corresponding locally calculated code.  
Severely Errored Framing Event: A severely-errored-framing event is the occurrence of two or more framing-  
bit-pattern errors within a 3-ms period. Contiguous 3-ms intervals shall be examined. The 3-ms period may  
coincide with the ESF. The severely-errored-framing event, while similar in form to criteria for declaring a  
terminal has lost framing, is only designed as a performance indicator; existing terminal out-of-frame criteria  
will continue to serve as the basis for terminal alarms.  
Frame-Synchronization-Bit Error Event: A frame-synchronization-bit-error event is the occurrence of a  
received framing-bit-pattern not meeting the severely-errored-framing event criteria.  
Line-Code Violation event: A line-code violation event is a bipolar violation of the incoming data. A line-code  
violation event for an B8ZS-coded signal is the occurrence of a received excessive zeros (EXZ) or a bipolar  
violation that is not part of a zero-substitution code.  
Controlled Slip Event: A controlled-slip event is a replication, or deletion, of a T1 frame by the receiving  
terminal. A controlled slip may occur when there is a difference between the timing of a synchronous  
receiving terminal and the received signal.  
6.7.4  
Path and Test Signal Identification Message  
The path identification message is used to identify the path between the source terminal and the sink terminal.  
The test signal identification message is used by test signal generating equipment. Both identification  
messages are made up of 82 bytes of data. Byte 1 to 4, 81 and 82 are the message header and bytes 5 to 80  
contain six data elements. These messages use the SAPI/TEI value of 0x15 to differentiate themselves from  
the performance report message.  
6.7.5  
Frame Structure  
The message structure of message-oriented signal is shown in Figure 35. Two format types are shown in the  
figure: format A for frames which are sending performance report message and format B for frames which  
containing a path or test signal identification message. The following abbreviations are used:  
SAPI: Service Access Point Identifier  
C/R: Command or Response  
EA: Extended Address  
TEI: Terminal Endpoint Identifier  
FCS: Frame Check Sequence  
6.7.6  
Flag Sequence  
All frames shall start and end with the flag sequence consisting of one 0 bit followed by six contiguous 1 bits  
and one 0 bit. The flag preceding the address field is defined as the opening flag. The flag following the Frame  
Check Sequence (FCS) field is defined as the closing flag. The closing flag may also serve as the opening flag  
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