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XR17D154IVTR-F 参数 Datasheet PDF下载

XR17D154IVTR-F图片预览
型号: XR17D154IVTR-F
PDF下载: 下载PDF文件 查看货源
内容描述: [Serial I/O Controller, 4 Channel(s), 0.78125MBps, CMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-144]
分类和应用: PC
文件页数/大小: 69 页 / 840 K
品牌: EXAR [ EXAR CORPORATION ]
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xr  
XR17D154  
REV. 1.2.0  
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART  
EFR[4]: Enhanced Function Bits Enable  
Enhanced function control bit. This bit enables the functions in IER bits 4-7, ISR bits 4-5, FCR bits 4-5, and  
MCR bits 5-7 to be modified. After modifying any enhanced bits, EFR bit-4 can be set to a logic 0 to latch the  
new values. This feature prevents legacy software from altering or overwriting the enhanced functions once  
set. Normally, it is recommended to leave it enabled, logic 1.  
Logic 0 = modification disable/latch enhanced features. IER bits 4-7, ISR bits 4-5, FCR bits 4-5, and MCR  
bits 5-7 are saved to retain the user settings. After a reset, the IER bits 4-7, ISR bits 4-5, FCR bits 4-5, and  
MCR bits 5-7 are set to a logic 0 to be compatible with the industry standard 16550 (default).  
Logic 1 = Enables the enhanced functions. When this bit is set to a logic 1 all enhanced features are  
enabled.  
EFR[5]: Special Character Detect Enable  
Logic 0 = Special Character Detect Disabled (default).  
Logic 1 = Special Character Detect Enabled. The UART compares each incoming receive character with  
data in Xoff-2 register. If a match exists, the received data will be transferred to FIFO and ISR bit-4 will be set  
to indicate detection of the special character. Bit-0 corresponds with the LSB bit for the receive character. If  
flow control is set for comparing Xon1, Xoff1 (EFR [1:0]=’10’) then flow control and special character work  
normally. However, if flow control is set for comparing Xon2, Xoff2 (EFR[1:0]=’01’) then flow control works  
normally, but Xoff2 will not go to the FIFO, and will generate an Xoff interrupt and a special character  
interrupt.  
TABLE 19: SOFTWARE FLOW CONTROL FUNCTIONS  
TX S/W FLOW CONTROL  
RX S/W FLOW CONTROL  
EFR BIT-3  
CONT-3  
EFR BIT-2  
CONT-2  
EFR BIT-1  
CONT-1  
EFR BIT-0  
CONT-0  
SOFTWARE FLOW CONTROL FUNCTIONS  
0
0
1
1
X
X
X
0
0
1
0
1
X
X
X
1
X
X
X
X
0
0
1
1
X
X
X
X
0
1
0
1
No transmit flow control  
Transmit Xon2, Xoff2  
Transmit Xon1, Xoff1  
Transmit Xon1 and Xon2, Xoff1 and Xoff2  
No receive flow control  
Receiver compares Xon2, Xoff2  
Receiver compares Xon1, Xoff1  
Transmit Xon2, Xoff2  
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2  
1
0
1
0
0
1
1
1
1
1
1
1
Transmit Xon1, Xoff1  
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2  
No transmit flow control  
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2  
Transmit Xon1 and Xon2, Xoff1 and Xoff2  
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2  
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