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ST16C1550IJ28 参数 Datasheet PDF下载

ST16C1550IJ28图片预览
型号: ST16C1550IJ28
PDF下载: 下载PDF文件 查看货源
内容描述: 具有16字节FIFO 2.97V至5.5V UART [2.97V TO 5.5V UART WITH 16-BYTE FIFO]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路先进先出芯片数据传输时钟
文件页数/大小: 37 页 / 403 K
品牌: EXAR [ EXAR CORPORATION ]
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ST16C1550/51  
2.97V TO 5.5V UART WITH 16-BYTE FIFO  
REV.4.2.0  
ABSOLUTE MAXIMUM RATINGS .................................................................................. 25  
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%)................................................. 25  
ELECTRICAL CHARACTERISTICS................................................................................ 25  
DC ELECTRICAL CHARACTERISTICS.............................................................................................................. 25  
AC ELECTRICAL CHARACTERISTICS.............................................................................................................. 26  
TA=0O TO 70OC (-40O TO +85OC FOR INDUSTRIAL GRADE PACKAGE), VCC IS 2.97V TO 5.5V...................... 26  
FIGURE 8. CLOCK TIMING............................................................................................................................................................... 27  
FIGURE 9. MODEM INPUT/OUTPUT TIMING ...................................................................................................................................... 27  
FIGURE 10. DATA BUS READ TIMING.............................................................................................................................................. 28  
FIGURE 11. DATA BUS WRITE TIMING ............................................................................................................................................ 28  
FIGURE 12. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE]............................................................................................ 29  
FIGURE 13. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE].......................................................................................... 29  
FIGURE 14. RECEIVE READY & INTERRUPT TIMING [FIFO MODE, DMA DISABLED] .......................................................................... 30  
FIGURE 15. RECEIVE READY & INTERRUPT TIMING [FIFO MODE, DMA ENABLED]........................................................................... 30  
FIGURE 16. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE DISABLED].............................................................. 31  
FIGURE 17. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE ENABLED]............................................................... 31  
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1 MM).................................................................................... 32  
PACKAGE DIMENSIONS (28 PIN PDIP).......................................................................................................... 33  
PACKAGE DIMENSIONS (28 PIN PLCC)......................................................................................................... 34  
REVISION HISTORY ...................................................................................................................................... 35  
TABLE OF CONTENTS ............................................................................................................ I  
II  
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