Rdrv_33_6
Ileakage
Driver Series Output Resistance
(3.3V-6mA)
30
67
Ω
Driver Pad Leakage
Vdde = 3.6V
100
nA
Pad voltage
driven to 3.6V
through 0.010
ohm load.
Note
The DC information is preliminary and subject to change.
Table 7-7. DC Electrical Characteristics (Power and Current)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
PTOTAL
Total Power dissipation
Vdde = 3.6V,
Vddi= 1.1V
T = 25°C
2.5
3.1
W
PI/O
I/O Power dissipation
Core Power dissipation
Vdde = 3.6V,
Vddi = 1.1V
T = 25°C
0.5
2
W
PCORE
Iddi_core
Iddi_pll
Idde_io
Iddh
Vddi = 1.1V
T = 25°C
W
A
A
A
A
A
A
Active Supply Current (vddi) (Core,
includes SERDES logic and I/O)
Vddi=1.0V
T = 70°C
2.5
Active Supply Current (vddi - pll)
(PLL)
Vddi=1.0V
T = 70°C
0.01
0.10
0.25
0.25
1.1
Active Supply Current (vdde)
(GPIO)
Vddi = 3.6V
T = 70°C
Active Supply Current (vddh) (host
Interface)
Vddh=1.1V
T = 70°C
Iddn
Active Supply Current (vddn)
(network Interface)
Vddn=1.0V
T = 70°C
Iddr
Active Supply Current (vddr)
(DDR2) (Includes ODT termination
surge current (5-6ma per data
group signal))
Vddr = 1.8V
T = 70°C
Ivtt
Active Supply Current
(vttn, vtth) (Termination) Per
connection (2 connections per chip)
Vttn =Vttn
1.5V
T = 70°C
=
0.06
A
Note
1. The DC information is preliminary and subject to change.
2. The current consumption for core, PLL, and I/O subsections represent peak instantaneous current
requirements and should be used for power planning. The sum of these current requirements will
exceed the maximum power numbers (PIO and PCORE), which represent average worst-case
thermal parameters.
7.5 Power Sequencing
In order to prevent latch-up, it is recommended that the 44x0/84x0 power supplies be
brought up starting with the highest voltage first and ending with the lowest voltage. It is
also permitted to bring up the supplies simultaneously, making sure that the lower-voltage
supplies do not exceed the higher-voltage supplies during the ramp. The intent is to make
4450 – Data Sheet, DS-0131-06
Page69
Hifn Confidential