VIL_sstl18
Low level input voltage (DDR2
SDRAM Interface)
Vddr = 1.8V
-0.3
V
V
Vvref_ddr
tbd V
=
VIH_sslt18
High level input voltage (DDR2
SDRAM Interface)
Vddr = 1.8V
Vddr
+0.3
Vvref_ddr
tbd V
=
VOL-sstl18
Low level output voltage
(DDR2 - SSTL_18 Driver)
High level output voltage
(DDR2 - SSTL_18 Driver)
RTT1 Effective Impedance Value
Vddr= 1.9V
IOL = 4mA
0
V
V
VOH_sstl18
Vddr =1.9V
IOH = -4mA
Vddr
RTT1(eff)
60
120
9
75
90
Ω
Ω
Ω
RTT2(eff)
RTT1 Effective Impedance Value
150
16
180
25
Raserddrv_18
SSTL_18 Address Driver Series
Output Resistance
Reserddrv_18
Rdserddrv_18
SSTL_18 Clock Driver Series Output
Resistance
9
9
16
16
25
25
Ω
Ω
SSTL_18 Data Driver Series Output
Resistance
Ileakage
Driver Pad leakage
100
250
nA
µA
Iponddq_u
Receiver Current Draw (un-
terminated)
Iponddq_t
Ipdnddq
Receiver Current Draw (terminated)
Receiver IDDQ PON
850
10
µA
nA
Note
The DC information is preliminary and subject to change.
Table 7-6. DC Electrical Characteristics (GPIO Interfaces)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VIL_lvcmos/
lvttl
Low level input voltage (GPIO)
Vdde = 3.6V
0.8
V
VIH_lvcmos/
High level input voltage (GPIO)
Low level output voltage (GPIO)
Vdde = 3.6V
2.0
V
V
lvttl
0
VOL_lvcmos/
lvttl
Vdde = 3.6V
IOL = 4mA
0.4
VOH_lvcmos/
High level output voltage (GPIO)
Low level Output current (GPIO)
High level Output current (GPIO)
Vdde = 3.6V
IOH = -4mA
Vdde-
Vdde
V
lvttl
0.4
IOL_lvcmos/
lvttl
VIN = Vss
Vdde = 3.6V
- 6
mA
mA
IOH_lvcmos/
lvttl
VIN = Vdde
Vdde = 3.6V
6
4450 – Data Sheet, DS-0131-06
Page68
Hifn Confidential