XR16C2850
Programming the Baud Rate Generator Registers
DLM (MSB) and DLL (LSB) provides a user capability
for selecting the desired final baud rate. The example
in Table 4 below, shows the two selectable baud rate
tables available when using a 7.3728 MHz crystal.
Table 4, BAUD RATE GENERATOR PROGRAMMING TABLE (7.3728 MHz CLOCK):
Output
Output
User
User
DLM
Program
Value
DLL
Program
Value
Baud Rate Baud Rate 16 x Clock 16 x Clock
MCR
BIT-7=1
MCR
Bit-7=0
Divisor
(Decimal)
Divisor
(HEX)
(HEX)
(HEX)
50
75
150
300
600
1200
2400
4800
7200
9600
19.2k
38.4k
57.6k
115.2k
200
300
600
2304
1536
768
384
192
96
48
24
16
12
900
600
300
180
C0
60
30
18
10
0C
06
09
06
03
01
00
00
00
00
00
00
00
00
00
00
00
00
00
80
C0
60
30
18
10
0C
06
03
02
01
1200
2400
4800
9600
19.2K
28.8K
38.4k
76.8k
153.6k
230.4k
460.8k
6
3
2
1
03
02
01
Figure 11, Baud Rate Generator Circuitry
MCR
Bit-7=0
Divide
by
1 logic
Clock
Oscillator
Logic
Baudrate
Generator
Logic
XTAL1
XTAL2
-BAUDOUT
Divide
by
4 logic
MCR
Bit-7=1
Rev. 1.00P
13
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