EM638165
EtronTech
CAS Latency Field (A6~A4)
•
This field specifies the number of clock cycles from the assertion of the Read command to the first read
whole value satisfying the following formula must be programmed into this field.
tCAC(min) ≤ CAS Latency X tCK
Table 9. CAS latency Field
A6
0
A5
0
A4
0
CAS Latency
Reserved
Reserved
2 clocks
0
0
1
0
1
0
0
1
1
3 clocks
1
X
X
Reserved
Test Mode field (A8~A7)
•
These two bits are used to enter the test mode and must be programmed to "00" in normal operation.
Table 10. Test Mode Field
A8
0
A7
0
Test Mode
Normal mode
0
1
Vendor Use Only
Vendor Use Only
1
X
Write Burst Length (A9)
•
This bit is used to select the write burst mode. When the A9 bit is "0", the Burst-Read-Burst-Write mode
is selected. When the A9 bit is "1", the Burst-Read-Single-Write mode is selected.
Table 11. Write Burst Length
A9
0
Write Burst Mode
Burst-Read-Burst-Write
Burst-Read-Single-Write
1
Note: A10 and BA0, 1 should stay “L” during mode set cycle.
9
No-Operation command
(RAS# = "H", CAS# = "H", WE# = "H")
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS# is Low).
This prevents unwanted commands from being registered during idle or wait states.
10 Burst Stop command
(RAS# = "H", CAS# = "H", WE# = "L")
The Burst Stop command is used to terminate either fixed-length or full-page bursts. This command is
only effective in a read/write burst without the auto precharge function. The terminated read burst ends
after a delay equal to the CAS latency (refer to the following figure). The termination of a write burst is
shown in the following figure.
Rev. 5.2
14
Rev. 5.2
Dec. /2013
ETRON [ ETRON TECHNOLOGY, INC. ]
