M32L1632512A
AC OPERATING TEST CONDITIONS (VDD = 3.3V ± 0.3V, TA = 0 to 70
)
°C
Parameter
Value
VIH/VIL = 2.4V/0.4V
1.4V
AC Input levels
Input timing measurement reference level
Input rise and fall-time (See note3)
tR/tF = 1ns/1ns
Output timing measurement reference level
Output load condition
1.4V
See Fig. 2
VREF = 1.4V
50
3 .3 V
1200
VOH (DC) =2.4V , IOH = -2 m A
VOL (DC) =0.4V , IOL = 2 m A
Ou tput
Ou tput
Z0 =50
30pF
30pF
870
(Fig. 1) DC Output Load Circuit
(Fig. 2) AC Output Load Circuit
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
-5/5S
-6/6S
-7/7S
-8/8S
Parameter
Symbol
Unit
Note
Min Max Min Max Min Max Min Max
CAS latency =3
5
7.5
-
6
8
-
7
10
-
8
12
-
CLK cycle time
1000
1000
1000
1000
ns
ns
1
1, 2
2
tCC
tSAC
tOH
CAS latency =2
CAS latency =3
CAS latency =2
CAS latency =3
CAS latency =2
CLK to valid
output delay
4.5
5
5.5
6
6
7
6.5
8
-
-
-
-
Output data
hold time
2
2
2
2
2
2
ns
ns
ns
2
2
2
CLK high pulse width
CLK low pulse width
Input setup time
2
2.5
3
3
3
3
3
2
tCH
tCL
tSS
tSH
tSLZ
2
2
1
1
2
2
1
1
2.5
2
3
2.5
1
ns
ns
ns
ns
Input hold time
1
CLK to output in Low-Z
CLK to output CAS latency =3
1
1
-
-
5
5
-
-
5.5
6
-
-
6
7
-
-
6.5
8
ns
tSHZ
In Hi-Z
CAS latency =2
* All AC parameters are measured from half to half.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6
6/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
