ESMT
Preliminary
M24L16161A
AC Test Conditions (TA = -25°C to + 85°C (Standard), TA = -40°C to + 85°C (Industrial))
Input Pulse Levels
0.4V to 2.4V
5 ns
Input Rise And Fall Time
Input and Output Timing Reference Levels
Output Load
1.5V
See Figures 1 and 2
AC Test Loads
Ω
RL = 50
VL = 1.5V
DOUT
CL 1 = 50pF
Ω
Z0 = 50
Note :
1. Including scope and jig capacitance.
Power-Up Sequence
1. Supply power.
2. Maintain stable power for longer than 200μs.
Deep Power Entry Sequence
1. Keep CE2 low state.
Deep power down mode is maintained while CE2 is low state.
Deep Power Exit Sequence
1. Keep CE2 high state.
2. Maintained stable power for longer than 200μs.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2003
Revision : 0.2
10/15
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
