ESMT
M14D5121632A (2H)
Operation Temperature Condition (TC) -40°C~95°C
Functional Truth Table
Current State
Address
Command
DESEL
Action
CS RAS CAS
WE
X
H
L
X
H
X
H
X
X
NOP or Power-Down
NOP or Power-Down
H
NOP
READ / READA /
WRITE / WRITEA
L
H
L
X
BA, CA, A10
ILLEGAL (*1)
IDLE
L
L
L
L
L
L
L
L
H
H
L
H
L
BA, RA
Active
Bank Active, Latch RA
Precharge / Precharge All
Refresh (*2)
BA, A10 / A10
X
PRE / PREA
Refresh
H
L
L
Op-Code Mode-Add MRS / EMRS
Mode Register setting / Extended
Mode Register setting (*2)
H
L
X
H
X
H
X
H
X
X
DESEL
NOP
NOP
NOP
Begin Read, Latch CA,
Determine Auto Precharge
L
L
H
H
L
L
H
L
BA, CA, A10
BA, CA, A10
READ / READA
Begin Write, Latch CA,
Determine Auto Precharge
WRITE / WRITEA
BANK ACTIVE
L
L
L
L
H
L
L
L
H
H
L
H
L
BA, RA
Active
ILLEGAL (*1)
BA, A10 /A10
X
PRE / PREA
Refresh
Precharge / Precharge All
ILLEGAL
L
H
L
L
L
Op-Code Mode-Add MRS / EMRS
ILLEGAL
X
H
X
H
X
H
X
X
DESEL
NOP
NOP (Continue Burst to END)
NOP (Continue Burst to END)
Terminate Burst, Latch CA,
Begin New Read,
L
H
L
H
BA, CA, A10
READ / READA
Determine Auto Precharge (*1, 4)
READ
L
L
L
L
L
H
L
L
H
L
L
H
H
L
L
H
L
BA, CA, A10
BA, RA
WRITE / WRITEA
Active
ILLEGAL (*1)
ILLEGAL (*1)
L
BA, A10 / A10
X
PRE / PREA
Refresh
ILLEGAL (*1) / ILLEGAL
ILLEGAL
L
H
L
L
L
Op-Code Mode-Add MRS / EMRS
ILLEGAL
X
H
H
X
H
L
X
H
H
X
DESEL
NOP (Continue Burst to end)
X
NOP
NOP (Continue Burst to end)
ILLEGAL (*1)
BA, CA, A10
READ / READA
Terminate Burst, Latch CA,
Begin new Write,
Determine Auto-Precharge (*1, 4)
L
H
L
L
BA, CA, A10
WRITE / WRITEA
WRITE
L
L
L
L
L
L
L
L
H
H
L
H
L
BA, RA
Active
ILLEGAL (*1)
ILLEGAL (*1) / ILLEGAL
ILLEGAL
BA, A10 / A10
X
PRE / PREA
Refresh
H
L
L
Op-Code Mode-Add MRS / EMRS
ILLEGAL
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2011
Revision : 1.1
56/62
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
