ESMT
M13S5121632A (2R)
PIN CONFIGURATION (TOP VIEW)
(TSOPII 66L, 400milX875mil Body, 0.65mm Pin Pitch)
Pin Description
Pin Name
Function
Address inputs
- Row address A0~A12
- Column address A0~A9
A10/AP: AUTO Precharge
BA0, BA1: Bank selects (4 Banks)
Data-in/Data-out
Row address strobe
Column address strobe
Write enable
Ground
Power
Pin Name
Function
DM is an input mask signal for write data.
LDM corresponds to the data on DQ0~DQ7;
UDM correspond to the data on DQ8~DQ15.
Clock input
Clock enable
Chip select
Supply Voltage for DQ
Ground for DQ
Reference Voltage for SSTL_2
No connection
A0~A12,
BA0, BA1
LDM, UDM
DQ0~DQ15
RAS
CAS
WE
CLK, CLK
CKE
CS
V
DDQ
V
SSQ
V
REF
NC
V
SS
V
DD
Bi-directional Data Strobe.
LDQS, UDQS LDQS corresponds to the data on DQ0~DQ7;
UDQS correspond to the data on DQ8~DQ15.
Elite Semiconductor Memory Technology Inc.
Publication Date : Feb. 2013
Revision : 1.3
3/48
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
