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M12L16161A-5TIG 参数 Datasheet PDF下载

M12L16161A-5TIG图片预览
型号: M12L16161A-5TIG
PDF下载: 下载PDF文件 查看货源
内容描述: 512K X 16位X 2Banks同步DRAM [512K x 16Bit x 2Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 29 页 / 698 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M12L16161A  
Operation temperature condition -40~85℃  
Read Interrupted by Precharge Command & Read Burst Stop Cycle @Burst Length =Full page  
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1
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5
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10  
11  
12  
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16  
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18  
19  
C L O C K  
C K E  
H I G H  
CS  
RAS  
CAS  
A D D R  
BA  
CA a  
CA b  
RA a  
A10/AP  
RA a  
*Note2  
1
QAa3 QAa4  
1
QAa2  
QAa1  
QAb0  
QAb1  
QAb0  
QAb5  
QAb3 QAb4  
QAa0  
CL= 2  
QAa1  
QAa0  
QAb2  
D Q  
2
2
QAa2 QAa3 QAa4  
CL= 3  
WE  
QAb4  
QAb3  
QAb1 QAb2  
QAb5  
D Q M  
Read  
(A - Ban k )  
Burst Stop  
Precharge  
( A- B an k )  
Read  
(A - Ban k )  
Row A c t i ve  
( A- B an k )  
:D on' t C ar e  
*Note: 1.Burst can’t end in full page mode, so auto precharge can’t issue.  
2.About the valid DQs after burst stop, it is same as the case of RAS interrupt.  
Both cases are illustrated above timing diagram. See the label 1,2 on them.  
But at burst write, burst stop and RAS interrupt should be compared carefully.  
Refer the timing diagram of “Full page write burst stop cycle”.  
3.Burst stop is valid at every burst length.  
Elite Semiconductor Memory Technology Inc.  
Publication Date : May. 2007  
Revision : 1.1 21/29  
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