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M12L16161A-5TIG 参数 Datasheet PDF下载

M12L16161A-5TIG图片预览
型号: M12L16161A-5TIG
PDF下载: 下载PDF文件 查看货源
内容描述: 512K X 16位X 2Banks同步DRAM [512K x 16Bit x 2Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 29 页 / 698 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M12L16161A  
Operation temperature condition -40~85℃  
Burst Read Single bit Write Cycle @Burst Length=2  
C L O C K  
* N o t e 1  
H I G H  
C K E  
C S  
RA S  
* N o t e 2  
CA S  
CA a RB b CA b  
RA a  
C B c  
A D D R  
BA  
R A c  
CA d  
A10/AP  
RA a  
R A c  
RB b  
CL= 2  
CL = 3  
DAa0  
QAb0 QAb1  
QAd0 QAd1  
DBc 0  
DBc 0  
D Q  
QAb0 QAb1  
QAd0 QAd1  
DAa0  
W E  
D Q M  
Row A c t i ve  
( A- B an k )  
Rea d  
( A- B an k )  
Ro w A c t i ve  
( A- B an k )  
Pr e ch ar g e  
( A- B an k )  
Row Active  
(B-Bank)  
W r i t e wi t h  
Read with  
W r i t e  
Au to Pr echar g e  
( B- Ba nk )  
Auto Precharge  
(A-Bank)  
( A - Ban k )  
:D o n' t C ar e  
*Note:1.BRSW modes is enabled by setting A9 “High” at MRS(Mode Register Set).  
At the BRSW Mode, the burst length at write is fixed to “1” regardless of programmed burst length.  
2.When BRSW write command with auto precharge is executed, keep it in mind that tRAS should not be violated.  
Auto precharge is executed at the next cycle of burst-end, so in the case of BRSW write command, the precharge  
command will be issued after two clock cycles.  
Elite Semiconductor Memory Technology Inc.  
Publication Date : May. 2007  
Revision : 1.1 23/29  
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