ESMT
FUNCTION TRUTH TABLE (TABLE2)
M12L128168A
Current
State
CKE
( n-1 )
H
L
CKE
n
ADDR
ACTION
Note
CS RAS CAS WE
X
H
H
H
H
H
L
X
H
L
X
X
H
H
H
L
X
X
H
H
L
X
X
H
L
X
INVALID
X
Exit Self Refresh ꢁIdle after tRFC (ABI)
Exit Self Refresh ꢁIdle after tRFC (ABI)
ILLEGAL
6
6
Self
L
X
Refresh
L
L
X
L
L
X
X
X
X
X
H
L
X
ILLEGAL
L
L
X
X
X
X
H
H
L
X
ILLEGAL
L
X
X
H
L
X
X
X
H
H
H
L
X
NOP (Maintain Self Refresh)
INVALID
H
L
X
H
H
H
H
H
L
X
All
Banks
X
Exit Self Refresh ꢁABI
Exit Self Refresh ꢁABI
ILLEGAL
7
7
L
X
Precharge
Power
L
L
X
L
L
X
X
X
X
X
H
L
X
ILLEGAL
Down
L
L
X
X
X
X
H
H
L
X
ILLEGAL
L
X
X
H
L
X
X
X
H
H
H
L
X
NOP (Maintain Low Power Mode)
Refer to Table1
H
H
H
H
H
H
H
H
H
L
H
L
X
X
Enter Power Down
Enter Power Down
ILLEGAL
8
8
L
X
L
L
X
All
Banks
Idle
L
L
X
H
H
L
X
ILLEGAL
L
L
H
H
L
RA
Row (& Bank) Active
NOP
L
L
L
X
L
L
L
X
Enter Self Refresh
Mode Register Access
NOP
8
L
L
L
L
L
OP Code
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Any State
other than
Listed
H
H
L
H
L
Refer to Operations in Table 1
Begin Clock Suspend next cycle
Exit Clock Suspend next cycle
Maintain Clock Suspend
9
9
H
L
above
L
Abbreviations : ABI = All Banks Idle, RA = Row Address
*Note : 6.CKE low to high transition is asynchronous.
7.CKE low to high transition is asynchronous if restart internal clock.
A minimum setup time 1CLK + tSS must be satisfy before any command other than exit.
8.Power down and self refresh can be entered only from the all banks idle state.
9.Must be a legal command.
Elite Semiconductor Memory Technology Inc.
Publication Date: Oct. 2006
Revision: 2.0
26/43
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
