M11L416256A/M11L416256SA
(Continued)
-25
-28
-30
-35
-40
PARAMETER
SYMBOL
UNIT NOTES
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
RCH
RRH
ns
t
t
0
0
3
0
0
3
Read Command Hold Time Reference to
Read Command Hold Time Reference to
0
0
3
0
0
3
0
0
3
9,15,19
CAS
RAS
ns
ns
9
CLZ
20
t
to Output in Low-Z
CAS
Output Buffer Turn-off Delay From
RAS
or
CAS
OFF1
3
15
6
3
15
7
ns
ns
t
3
15
8
3
15
8
3
15
8
10,17,20
17,26
OFF2
t
t
t
t
Output Buffer Turn-off to
OE
Write Command Setup Time
Write Command Hold Time
WCS
WCH
WCR
WP
ns
ns
ns
ns
11,15,18
15,25
15
0
5
0
5
0
5
0
5
0
5
22
24
Write Command Hold Time(Reference to
Write Command Pulse Width
)
26
30
34
RAS
15
t
5
7
5
7
5
8
6
5
9
7
5
10
8
RWL
ns
15
t
t
Write Command to
Lead Time
Lead Time
RAS
CAS
CWL
ns
ns
ns
15,19
12,20
12,20
5
0
5
0
Write Command to
Data-in Setup Time
Data-in Hold Time
DS
DH
t
0
5
0
5
0
5
t
5
5
DHR
ns
ns
ns
ns
t
22
24
Data-in Hold Time (Reference to
)
26
30
34
RAS
RWD
34
21
17
38
25
19
11
11
t
t
t
to
Delay Time
WE
46
31
25
51
34
26
56
36
27
RAS
AWD
CWD
Column Address to
Delay Time
WE
11,18
2,3
to
Delay Time
WE
CAS
Transition Time (rise or fall)
Refresh Period (512 cycles)
T
ns
ms
ms
t
1.5 50 1.5 50
1.5 50 2.5 50 2.5 50
REF
REF
t
8
8
8
8
8
Refresh Period (512 cycles) Self Refresh
t
32
32
32
32
32
RPC
CSR
CHR
ns
ns
ns
t
t
t
10
5
10
5
to
Precharge Time
CAS
10
10
10
10
10
10
10
10
10
RAS
CAS
CAS
1,18
1,19
Setup Time(CBR REFRESH)
Hold Time(CBR REFRESH)
7
7
Hold Time From
Write Cycle
During Read-Mode-
WE
High Setup Time
CAS
OE
OEH
OES
ns
16
t
t
4
4
4
4
5
ns
ns
ns
4
2
2
4
2
2
Low to
4
2
2
4
2
2
5
2
2
OE
OE
OE
OE
OEHC
t
High Hold Time From
Precharge Time
High
CAS
OEP
t
Setup Prior to
During Hidden Refresh
RAS
ORD
ns
ns
t
0
4
0
5
0
5
0
5
0
6
Cycle
Last
High
Going Low to First
Returning
CAS
CAS
CLCH
21
t
COH
ns
ns
t
3
3
3
3
Data Output Hold After
Returning Low
3
3
3
3
3
3
CAS
WHZ
t
7
7
7
7
7
Output Disable Delay From
WE
µ s
RASS
RPS
27,28
27,28
27,28
t
100
43
-50
5
Self Refresh
Self Refresh
Self Refresh
Low Pulse width
High Precharge Time
Hold Time
100
55
-50
100
65
-50
100
75
-50
RAS
RAS
CAS
ns
ns
t
5
CHS
t
-50
Elite Memory Technology Inc
Publication Date: Agu. 2001
Revision : 1.3 5/16
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
