M11L416256A/M11L416256SA
CBR REFRESH CYCLE
(A0~A8 ; OE = DON’T CARE)
tR P
tR A S
tR P
t R A S
VI H
VI L
R A S
tR P C
tC P
tC S R
tC S R
tC H R
tR P C
tCH R
VI H
VI L
CA SL ,C A SH
O PE N
I/O
tRC H
V I H
V I L
W E
HIDDEN REFRESH CYCLE
( WE = HIGH ; OE = LOW)
( R E A D )
( R E F R E S H )
t R A S
t R A S
tR P
VI H
VI L
RA S
tC R P
tR C D
tC H R
tR S H
V I H
V I L
CA SL ,C A SH
t A R
tR AL
tC AH
tR A D
tR A H
tA S R
tA S C
V I H
V I L
R O W
C O L U M N
A D D R
t A A
NO TE 1
tO F F 1
tR A C
t C A C
tC L Z
VO H
VO L
VAL ID D AT A
OP EN
O PEN
I/O
OE
tO F F 2
tO A C
tO R D
VI H
VI L
D O N 'T C A R E
U N D E F I N E D
OFF1
Note : 1. t
is reference from the rising edge of RAS or CAS , whichever occurs last.
Elite Memory Technology Inc
Publication Date: Agu. 2001
Revision : 1.3
12/16
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
