ESMT
(Preliminary)
F25S04PA
Deep Power Down (DP)
The Deep Power Down instruction is for minimizing power
consumption (the standby current is reduced from ISB1 to ISB2.).
Once the device is in deep power down status, all instructions will
be ignored except the Release from Deep Power Down
instruction (RDP) and Read Electronic Signature instruction
(RES). The device always power-up in the normal operation with
the standby current (ISB1). See Figure 15 for the Deep Power
Down instruction.
This instruction is initiated by executing an 8-bit command, B9H,
and then CE must be driven high. After CE is driven high, the
device will enter to deep power down within the duration of TDP
.
CE
MODE3
0
1
2
3
4
5
6
7
TDP
SCK MODE0
B9
SI
MSB
Standard Current
Deep Power Down Current
(ISB2)
Figure 15: Deep Power Down Instruction
Release from Deep Power Down (RDP) and Read-Electronic-Signature (RES)
The Release form Deep Power Down and Read-Electronic-
Signature instruction is a multi-purpose instruction.
CE low and executing an 8-bit command, ABH, followed by 3
dummy bytes. The Electronic-Signature byte is then output from
the device. The Electronic-Signature can be read continuously
The instruction can be used to release the device from the deep
power down status. This instruction is initiated by driving CE
until CE go high. See Figure 17 for RES sequence. After
driving CE high, it must remain high during for the duration of
low and executing an 8-bit command, ABH, and then drive CE
high. See Figure 16 for RDP instruction. Release from the deep
power down will take the duration of TRES1 before the device will
resume normal operation and other instructions are accepted.
T
RES2, and then the device will resume normal operation and
other instructions are accepted.
The instruction is executed while an Erase, Program or WRSR
cycle is in progress is ignored and has no effect on the cycle in
progress.
CE must remain high during TRES1
.
The instruction also can be used to read the 8-bit Electronic-
Signature of the device on the SO pin. It is initiated by driving
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2009
Revision: 0.2
18/34
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
