EN29LV160A
TABLE 15. ERASE AND PROGRAMMING PERFORMANCE
Limits
Max
Parameter
Comments
Typ
Unit
Sector Erase Time
Chip Erase Time
0.5
10
sec
Excludes 00H programming prior
to erasure
17.5
8
sec
µs
Byte Programming Time
Word Programming Time
200
200
8
µs
Excludes system level overhead
Minimum 100K cycles
Byte
16.8
8.4
50.4
25.2
Chip Programming
sec
Time
Word
Erase/Program Endurance
100K
cycles
Notes: Maximum program and erase time assume the following conditions
V
= 2.7 V , 85°C
cc
Table 16. LATCH UP CHARACTERISTICS
Parameter Description
Min
Max
Input voltage with respect to Vss on all pins except I/O pins
(including A9, Reset and OE#)
-1.0 V
12.0 V
Input voltage with respect to Vss on all I/O Pins
Vcc Current
-1.0 V
Vcc + 1.0 V
100 mA
-100 mA
Note : These are latch up characteristics and the device should never be put under these conditions.
Refer to Absolute Maximum ratings for the actual operating limits.
Table 17. 48-PIN TSOP PIN CAPACITANCE @ 25°C, 1.0MHz
Parameter Symbol
Parameter Description
Test Setup
= 0
Typ
Max
Unit
C
V
IN
IN
Input Capacitance
6
7.5
pF
C
V
= 0
OUT
OUT
Output Capacitance
8.5
7.5
12
9
pF
pF
C
V
= 0
IN2
IN
Control Pin Capacitance
Table 18. DATA RETENTION
Parameter Description
Test Conditions
Min
Unit
150°C
10
Years
Years
Minimum Pattern Data Retention Time
125°C
20
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
33
Rev. I, Issue Date: 2008/07/17
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
