S1D15E06 Series
(10) Display Data Read
This command allows the 8-bit data to be read from the address specified by the display data RAM. After reading,
column address or page address is automatically incremented +1 by the Display Data Input Direction select command.
This enables the MPU to read multiple word data continuously.
It should be noted that one dummy reading is essential immediately after the column address or page address has been
set. For details, see the description of “6.1.5 Access to display data RAM and internal register” in the Function
Description. When the serial interface is used, display data cannot be read.
E
RD
R/W
WR
A0
0
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
1
0
0
0
1
1
1
0
0
1
Read Data
(11) Display Data Input Direction Select
This command sets the direction where the display RAM address number is automatically incremented. For details,
see the description of “6.2.3 Column address circuit” in the Function Description.
E
RD
R/W
WR
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
Direction
Column
Page
0
1
0
1
0
0
0
0
1
0
1
(12) Column Address Set Direction
This command can reverse the relationship between the display RAM data column address and segment driver output
shown in Fig. 6.5 and 6.6. So you can reverse the sequence of segment driver output pins using this command. When
the display data is written or read, the column address is incremented by (+1) according to the column address given
in Fig. 6.4 and 6.5. For details, see the description of “6.2.3 Column address circuit” in the Function Description.
E
RD
R/W
WR
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
Setting
Normal
Reverse
0
1
0
1
0
1
0
0
0
0
1
(13) n-line Inversion Drive Register Set
This command sets the liquid crystal alternating drive reverse line count in the register to start line reverse driving
operation. The line count to be set is 4 to 128 (32 states for each 4 lines. For details, see the description of “6.4 Display
timing generation circuit” in the Function Description.
E
RD
R/W
WR
A0
0
D7
0
D6
0
D5
1
D4
1
D3
0
D2
1
D1
1
D0 Reverse line count
Command
1
1
0
0
0
1
*
*
*
P4
P3
P2
P1
P0 Reverse line count
*: denote invalid bits.
P4
0
P3
0
P2
0
P1
0
P0 Reverse line count
0
1
4 (1 × 4)
8 (2 × 4)
↓
0
0
0
0
↓
1
1
1
1
1
1
1
1
0
1
124 (31 × 4)
128 (32 × 4)
Rev. 2.1
EPSON
31
EPSON [ EPSON COMPANY ]
