欢迎访问ic37.com |
会员登录 免费注册
发布采购

S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
 浏览型号S1D13506的Datasheet PDF文件第397页浏览型号S1D13506的Datasheet PDF文件第398页浏览型号S1D13506的Datasheet PDF文件第399页浏览型号S1D13506的Datasheet PDF文件第400页浏览型号S1D13506的Datasheet PDF文件第402页浏览型号S1D13506的Datasheet PDF文件第403页浏览型号S1D13506的Datasheet PDF文件第404页浏览型号S1D13506的Datasheet PDF文件第405页  
Epson Research and Development  
Page 11  
Vancouver Design Center  
WE# Control  
Selects the WE# control used for the DRAM. DRAM  
uses one of two methods of control when writing to  
memory. These methods are referred to as 2-CAS# and  
2-WE#.  
The S5U13506 evaluation boards use DRAM requiring  
the 2-CAS# method.  
Refresh Time  
Selects the number of ms required to refresh 256 rows  
of DRAM.  
Suspend Mode Refresh  
Selects the DRAM refresh method used during power  
save mode.  
The S5U13506 evaluation boards use DRAM requiring  
CAS before RAS. For all other implementations, refer  
to the manufacturers specification for DRAM refresh  
requirements.  
CAS before RAS  
This setting is selected for DRAM that requires timing  
where the CAS signal occurs just before the RAS  
signal.  
Self refresh  
No refresh  
This setting is selected for DRAM that requires no  
signal from the S1D1306 to maintain memory refresh.  
This setting does not refresh the memory during power  
save mode. If this option is selected, the memory  
contents are lost during power save.  
Installed Memory  
Selects the amount of DRAM available for the display  
buffer.  
The S1D13506 evaluation board use 2M bytes of  
DRAM.  
13506CFG Configuration Program  
Issue Date: 01/03/14  
S1D13506  
X25B-B-001-02  
 复制成功!