Page 82
Epson Research and Development
Vancouver Design Center
DestinationAddress = (y × ScreenStride) + (x × BytesPerPixel)
= (38 × 640) + (25 × 1)
= 24345
= 5F19h
where:
BytesPerPixel = 1 for 8 bpp
BytesPerPixel = 2 for 15/16 bpp
ScreenStride = DisplayWidthInPixels × BytesPerPixel = 640 for 8 bpp
Program the BitBLT Destination Start Address Registers. REG[10Ah] is set to 00h,
REG[109h] is set to 5Fh, and REG[108h] is set to 19h.
2. Program the BitBLT Width Registers to 100 - 1. REG[111h] is set to 00h and
REG[110h] is set to 63h (99 decimal).
3. Program the BitBLT Height Registers to 20 - 1. REG[113h] is set to 00h and
REG[112h] is set to 13h (19 decimal).
4. Program the Source Phase in the BitBLT Source Start Address Register. In this exam-
ple, the data is WORD aligned, so the source phase is 0. REG[104h] is set to 00h.
5. Program the BitBLT Operation Register to select Transparent Write Blit. REG[103h]
is set to 04h.
6. Program the BitBLT Background Color Registers to select transparent color.
REG[114h] is set to 7Ch (124 decimal).
Note that for 15/16 bpp color depths, REG[115h] and REG[114h] are both required
and programmed directly with the value of the transparent background color.
7. Program the BitBLT Color Format Select bit for 8 bpp operations. REG[101h] is set
to 00h.
8. Program the BitBLT Memory Offset Registers to the ScreenStride in WORDS.
BltMemoryOffset = ScreenStride ÷ 2
= 640 ÷ 2
= 320
= 140h
REG[10Dh] is set to 01h and REG[10Ch] is set to 40h.
9. Calculate the number of WORDS the blit engine expects to receive.
nWORDS
= ((BlitWidth + 1 + SourcePhase) ÷ 2) × BlitHeight
= (100 + 1 + 0) ÷ 2 × 20
= 1000
= 3E8h
S1D13506
X25B-G-003-03
Programming Notes and Examples
Issue Date: 01/02/06
EPSON [ EPSON COMPANY ]
