Page 86
Epson Research and Development
Vancouver Design Center
SourceAddress
= PatternOffset + StartPatternY × 8 × BytesPerPixel + StartPatternX × BytesPerPixel
= 1M + (4 × 8 × 1) + (3 × 1)
= 1M + 35
= 1048611
= 100023h
where:
BytesPerPixel = 1 for 8 bpp
BytesPerPixel = 2 for 15/16 bpp
Program the BitBLT Source Start Address Registers. REG[106h] is set to 10h,
REG[105h] is set to 00h, and REG[104h] is set 23h.
3. Program the BitBLT Width Registers to 100 - 1. REG[111h] is set to 00h, REG[110h]
is set to 63h (99 decimal).
4. Program the BitBLT Height Registers to 250-1. REG[113h] is set to 00h, and
REG[112h] is set to F9h (249 decimal).
5. Program the BitBLT Operation Register to select the Pattern Fill with ROP.
REG[103h] is set to 06h.
6. Program the BitBLT ROP Code Register to select Destination = Source. REG[102h]
is set to 0Ch.
7. Program the BitBLT Color Format Select bit for 8 bpp operations. REG[101h] is set
to 00h.
8. Program the BitBLT Memory Offset Registers to the ScreenStride in WORDS.
BltMemoryOffset = ScreenStride ÷ 2
= 640 ÷ 2
= 320
= 140h
REG[10Dh] is set to 01h and REG[10Ch] is set to 40h.
9. Program the BitBLT Destination/Source Linear Select bits for a rectangular blit (Bit-
BLT Destination Linear Select = 0, BitBLT Source Linear Select = 0).
Start the blit operation. REG[100h] is set to 80h.
Note
The order of register initialization is irrelevant as long as all relevant registers are pro-
grammed before the BitBLT is initiated.
S1D13506
X25B-G-003-03
Programming Notes and Examples
Issue Date: 01/02/06
EPSON [ EPSON COMPANY ]
