Epson Research and Development
Page 81
Vancouver Design Center
10.2.7 Transparent Write Blit
The Transparent Write Blit increases the speed of transferring data from system memory to
the display buffer. Once the Transparent Write Blit begins, the blit engine remains active
until all pixels have been written.
The Transparent Write Blit updates a specified area of the display buffer with data supplied
by the CPU. This blit is typically used to copy a bitmap image from system memory to the
display buffer with one color marked as transparent. Any pixel of the transparent color is
not transferred. This allows fast display of non-rectangular images. For example, consider
a source bitmap having a red circle on a blue background. By selecting the blue color as the
transparent color and using the Transparent Write Blit on the whole rectangle, the effect is
a blit of the red circle only. The Transparent Write Blit supports both Destination Linear
and Destination Rectangular modes.
This Transparent Write Blit requires the CPU to provide data. The blit engine expects to
receive a certain number of WORDS. For 15/16 bpp color depths, the number of WORDS
is the same as the number of pixels due to the fact that each pixel is one WORD wide. The
number of WORD writes the blit engine expects is calculated using the following formula.
nWORDS
= nPixels
= Blit Width × Blit Height
For 8 bpp color depths, the formula must take into consideration that the blit engine accepts
only WORD accesses and each pixel is one BYTE. The blit engine needs to know whether
the first pixel of a line is stored in the low byte or high byte. This is determined by bit 0 of
the Source Start Address Register 0 (REG[104h]). If the Source Phase is 1 (bit 0 of the
Source Start Address Register 0 is set), the first pixel of each line is in the high byte of the
WORD and the contents of the low byte are ignored. If the Source Phase is 0, the first pixel
is in the low byte and the second pixel is in the high byte. Depending on the Source Phase
and the Blit Width, the last WORD in each line may contain only one pixel. It is always in
the low byte if more than one WORD per line is required. The number of WORD reads the
blit engine expects for 8 bpp color depths is shown in the following formula.
nWORDS
= ((BlitWidth + 1 + SourcePhase) ÷ 2) × BlitHeight
Note
The blit engine counts WORD writes in the blit address space. This does not imply only
16-bit CPU instructions are acceptable. If a system is able to separate one DWORD
write into two WORD writes, then 32-bit CPU instructions are acceptable. Otherwise,
two back to back 16-bit CPU instructions are required.
Example 14: Write 100 x 20 pixels at the screen coordinates x = 25, y = 38 using a
640x480 display at a color depth of 8 bpp. Transparent color is high in-
tensity blue (assumes LUT Index 124).
1. Calculate the destination address (upper left corner of the screen blit rectangle), using
the formula:
Programming Notes and Examples
Issue Date: 01/02/06
S1D13506
X25B-G-003-03
EPSON [ EPSON COMPANY ]
