Page 80
Epson Research and Development
Vancouver Design Center
DestinationAddress
= ((Y + Height - 1) × ScreenStride) + ((X + Width - 1) × BytesPerPixel)
= ((20 + 321 - 1) × (640 × 2)) + ((105 + 9 - 1) × 2)
= 435426
= 6A4E2h
where:
BytesPerPixel = 1 for 8 bpp
BytesPerPixel = 2 for 15/16 bpp
ScreenStride = DisplayWidthInPixels × BytesPerPixel = 1280 for 16 bpp
Program the BitBLT Source Start Address Registers. REG[106h] is set to 06h,
REG[105h] is set to 72h, and REG[104h] is set to D8h.
Program the BitBLT Destination Start Address Registers. REG[10Ah] is set to 06h,
REG[109h] is set to A4h, and REG[108h] is set to E2h.
2. Program the BitBLT Width Registers to 9 - 1. REG[111h] is set to 00h and
REG[110h] is set to 08h.
3. Program the BitBLT Height Registers to 321 - 1. REG[113h] is set to 01h and
REG[112h] is set to 40h (320 decimal).
4. Program the BitBLT Operation Register to select the Move Blit in Negative Direction
with ROP. REG[103] is set to 03h.
5. Program the BitBLT ROP Code Register to select Destination = Source. REG[102h]
is set to 0Ch.
6. Program the BitBLT Color Format Select bit for 16 bpp operations. REG[101h] is set
to 01h.
7. Program the BitBLT Memory Offset Registers to the ScreenStride in WORDS.
BltMemoryOffset = ScreenStride ÷ 2
= 640
= 280h
REG[10Dh] is set to 02h and REG[10Ch] is set to 80h.
8. Program the BitBLT Destination/Source Linear Select bits for a rectangular blit (Bit-
BLT Destination Linear Select = 0, BitBLT Source Linear Select = 0).
Start the blit operation. REG[100h] is set to 80h.
Note
The order of register initialization is irrelevant as long as all relevant registers are pro-
grammed before the BitBLT is initiated.
S1D13506
X25B-G-003-03
Programming Notes and Examples
Issue Date: 01/02/06
EPSON [ EPSON COMPANY ]
