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S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
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Page 76  
Epson Research and Development  
Vancouver Design Center  
Note  
The order of register initialization is irrelevant as long as all relevant registers are pro-  
grammed before the BitBLT is initiated.  
10.2.3 Color Expand BitBLT With Transparency  
This BitBLT operation is virtually identical to the Color Expand BitBLT, except the  
background color is completely ignored. All bits set to 1 in the source monochrome bitmap  
are color expanded to the foreground color. All bits set to 0 that would be expanded to the  
background color in the Color Expand BitBLT are not expanded at all.  
Program REG[103h] to 09h instead of 08h. Programming the background color is not  
required.  
10.2.4 Solid Fill BitBLT  
The Solid Fill BitBLT fills a rectangular area of the display buffer with a solid color. This  
operation is used to paint large screen areas or to set areas of the display buffer to a given  
value.  
Example 11: Fill a red 9 x 321 rectangle at the screen coordinates x = 100, y = 10 us-  
ing a 640x480 display at a color depth of 16 bpp.  
1. Calculate the destination address (upper left corner of the destination rectangle) using  
the following formula.  
DestinationAddress = (y × ScreenStride) + (x × BytesPerPixel)  
= (10 × (640 × 2)) + (100 × 2)  
= 13000  
= 32C8h  
where:  
BytesPerPixel = 1 for 8 bpp  
BytesPerPixel = 2 for 15/16 bpp  
ScreenStride = DisplayWidthInPixels × BytesPerPixel = 1280 for 16 bpp.  
Program the BitBLT Destination Start Address Registers. REG[10Ah] is set to 00h,  
REG[109h] is set to 32h, and REG[108h] is set to C8h.  
2. Program the BitBLT Width Registers to 9 - 1. REG[111h] is set to 00h and  
REG[110h] is set to 08h.  
3. Program the BitBLT Height Registers to 321 - 1. REG[113h] is set to 01h and  
REG[112h] is set to 40h (320 decimal).  
4. Program the BitBLT Foreground Color Registers. REG[119h] is set to F8h and  
REG[118h] is set to 00h (Full intensity red in 16 bpp is F800h).  
5. Program the BitBLT Operation Register to select Solid Fill. REG[103h] is set to 0Ch.  
S1D13506  
X25B-G-003-03  
Programming Notes and Examples  
Issue Date: 01/02/06  
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