Epson Research and Development
Page 31
Vancouver Design Center
5.2.1 Registers
REG[042h] LCD Display Start Address Register 0
LCD Display LCD Display LCD Display LCD Display LCD Display LCD Display LCD Display LCD Display
Start Address Start Address Start Address Start Address Start Address Start Address Start Address Start Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
REG[043h] LCD Display Start Address Register 1
LCD Display LCD Display LCD Display LCD Display LCD Display LCD Display LCD Display LCD Display
Start Address Start Address Start Address Start Address Start Address Start Address Start Address Start Address
Bit 15
REG[044h] LCD Display Start Address Register 2
n/a n/a n/a n/a
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
LCD Display LCD Display LCD Display LCD Display
Start Address Start Address Start Address Start Address
Bit 19
Bit 18
Bit 17
Bit 16
REG[062h] CRT/TV Display Start Address Register 0
CRT/TV CRT/TV CRT/TV CRT/TV
CRT/TV
CRT/TV
CRT/TV
CRT/TV
Display Start Display Start Display Start Display Start Display Start Display Start Display Start Display Start
Address
Bit 7
Address
Bit 6
Address
Bit 5
Address
Bit 4
Address
Bit 3
Address
Bit 2
Address
Bit 1
Address
Bit 0
REG[063h] CRT/TV Display Start Address Register 1
CRT/TV CRT/TV CRT/TV CRT/TV
CRT/TV
CRT/TV
CRT/TV
CRT/TV
Display Start Display Start Display Start Display Start Display Start Display Start Display Start Display Start
Address
Bit 15
Address
Bit 14
Address
Bit 13
Address
Bit 12
Address
Bit 11
Address
Bit 10
Address
Bit 9
Address
Bit 8
REG[064h] CRT/TV Display Start Address Register 2
CRT/TV
CRT/TV
CRT/TV
CRT/TV
Display Start Display Start Display Start Display Start
n/a
n/a
n/a
n/a
Address
Bit 19
Address
Bit 18
Address
Bit 17
Address
Bit 16
The Display Start Address registers form the word address to the display buffer where the
LCD or CRT/TV starts displaying from. An address of 0 points to the beginning of the
display buffer. Changing the start address registers by one pans from 1 to 4 pixels
depending on the current color depth. The following table lists the maximum number of
pixels affected by a change of one to these registers.
Table 5-1: Number of Pixels Panned When Start Address Changed By 1
Color Depth (bpp) Pixels per Word
Number of Pixels Panned
4
8
4
2
1
1
4
2
1
1
15
16
Programming Notes and Examples
Issue Date: 01/02/06
S1D13506
X25B-G-003-03
EPSON [ EPSON COMPANY ]
