Epson Research and Development
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5.1.1 Registers
REG[046h] LCD Memory Address Offset Register 0
LCD Memory LCD Memory LCD Memory LCD Memory LCD Memory LCD Memory LCD Memory LCD Memory
Address
Address
Address
Address
Address
Address
Address
Address
Offset Bit 7
Offset Bit 6
Offset Bit 5
Offset Bit 4
Offset Bit 3
Offset Bit 2
Offset Bit 1
Offset Bit 0
REG[047h] LCD Memory Address Offset Register 1
n/a n/a n/a n/a
LCD Memory LCD Memory LCD Memory
n/a
Address
Address
Address
Offset Bit 10
Offset Bit 9
Offset Bit 8
These registers form the 11-bit memory address offset for the LCD display. This offset
equals the number of words from the beginning of one line of the LCD display to the
beginning of the next line.
To maintain a constant virtual width as color depth changes, the memory address offset
must also change. At a color depth of 4 bpp each word contains 4 pixels, at 16 bpp each
word contains one pixel. The formula to determine the value for the memory address
registers is:
Offset
= PixelsPerVirtualLine ÷ PixelsPerWord
This value may not necessarily represent the number of words shown on the LCD display.
This is the virtual width of the display image and may be greater than or equal to the
physical display width. If PixelsPerVirtualLine equals the physical display width as set in
the LCD Horizontal Display Width register (REG[032h]), then the virtual display and
physical display are the same size.
REG[066h] CRT/TV Memory Address Offset Register 0
CRT/TV
Memory
CRT/TV
Memory
CRT/TV
Memory
CRT/TV
Memory
CRT/TV
Memory
CRT/TV
Memory
CRT/TV
Memory
CRT/TV
Memory
Address
Address
Address
Address
Address
Address
Address
Address
Offset Bit 7
Offset Bit 6
Offset Bit 5
Offset Bit 4
Offset Bit 3
Offset Bit 2
Offset Bit 1
Offset Bit 0
REG[067h] CRT/TV Memory Address Offset Register 1
CRT/TV
Memory
Address
CRT/TV
Memory
Address
CRT/TV
Memory
Address
n/a
n/a
n/a
n/a
n/a
Offset Bit 10
Offset Bit 9
Offset Bit 8
These registers form the 11-bit memory address offset for the CRT/TV display. This offset
equals the number of words form the beginning of one line of the CRT/TV display to the
beginning of the next line.
To maintain a constant virtual width as color depth changes, the memory address offset
must also change. At a color depth of 4 bpp each word contains 4 pixels, at 16 bpp each
word contains one pixel. The formula to determine the value for the memory address
registers is:
Programming Notes and Examples
Issue Date: 01/02/06
S1D13506
X25B-G-003-03