欢迎访问ic37.com |
会员登录 免费注册
发布采购

EM47FM3288SBB 参数 Datasheet PDF下载

EM47FM3288SBB图片预览
型号: EM47FM3288SBB
PDF下载: 下载PDF文件 查看货源
内容描述: 16GB ( 64mA的?? 8Bankà ?? 32 ),双数据速率3 SDRAM堆叠 [16Gb (64M×8Bank×32) Double DATA RATE 3 Stack SDRAM]
分类和应用: 动态存储器
文件页数/大小: 41 页 / 1147 K
品牌: EOREX [ EOREX CORPORATION ]
 浏览型号EM47FM3288SBB的Datasheet PDF文件第4页浏览型号EM47FM3288SBB的Datasheet PDF文件第5页浏览型号EM47FM3288SBB的Datasheet PDF文件第6页浏览型号EM47FM3288SBB的Datasheet PDF文件第7页浏览型号EM47FM3288SBB的Datasheet PDF文件第9页浏览型号EM47FM3288SBB的Datasheet PDF文件第10页浏览型号EM47FM3288SBB的Datasheet PDF文件第11页浏览型号EM47FM3288SBB的Datasheet PDF文件第12页  
EM47FM3288SBB  
AC and DC Logic Input Levels for Differential Signals  
Differential signals definition  
Differential AC and DC Input Levels  
Note  
Symbol  
Parameter  
Min.  
Max.  
Units  
VIHdiff  
VILdiff  
Differential input high  
Differential input low  
+0.2  
See Note3  
-0.2  
V
V
V
V
1
1
2
2
See Note3  
VIHdiff (AC)  
VILdiff (AC)  
AC Differential input high  
AC Differential input low  
2x(VIH(AC)-VREF)  
See Note3  
See Note3  
2x(VIL(AC)-VREF)  
Note1. It is used to define a differential signal slew-rate.  
Note2. For CK - /CK use VIH/VIL(AC) of address/command and VREFCA; for strobes (DQS, DQS) use VIH/VIL(AC) of  
DQs and VREFDQ; if a reduced ac-high or ac-low level is used for a signal group, then the reduced level applies  
also here.  
Note3. These values are not defined, however they single-ended signals CK, /CK, DQS, /DQS need to be  
within the respective limits (VIH(DC) max, VIL(DC)min) for single-ended signals.  
Jul. 2012  
8/41  
www.eorex.com  
 复制成功!