EM47FM3288SBB 参数 Datasheet PDF下载

EM47FM3288SBB

Differential swing requirements for clock (CK - /CK) and strobe (DQS - /DQS)

- Allowed time before ringback (tDVAC) for CK - /CK and DQS - /DQS

Slew Rate [V/ns]

-

>4.0

4.0

3.0

2.0

1.8

1.6

1.4

1.2

1.0

<1.0

tDVAC [ps] @ |VIH/Ldiff(ac)| = 350mV

Min

75

57

50

38

34

29

22

13

0

0

Max

-

-

-

-

-

-

-

-

-

-

tDVAC [ps] @ |VIH/Ldiff(ac)| = 300mV

Min

175

170

167

163

162

161

159

155

150

150

Max

-

-

-

-

-

-

-

-

-

-

Single-ended requirements for differential signals

Each individual component of a differential signal (CK, DQS, /CK, /DQS) has also to comply with certain

requirements for single-ended signals.

CK and /CK have to approximately reach VSEHmin / VSELmax (approximately equal to the ac-levels

(VIH(AC) / VIL(AC) ) for Address/Command signals) in every half-cycle.

DQS, /DQS have to reach VSEHmin / VSELmax [approximately the ac-levels (VIH(AC) / VIL(AC) ) for DQ

signals] in every half-cycle preceding and following a valid transition.

Note that the applicable AC-levels for Address/Command and DQ’s might be different per speed-bin etc. E.g., if

V

IHCA

(AC150)/V

ILCA

(AC150) is used for Address/Command signals, then these AC-levels apply also for the

single-ended components of differential CK and /CK.

Jul. 2012

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