EN29F010
Table 11. ERASE AND PROGRAMMING PERFORMANCE
Limits
Max
Parameter
Comments
Typ
Unit
Sector Erase Time
Chip Erase Time
0.3
5
sec
Excludes 00H programming prior to
erasure
3
7
35
200
2.5
sec
µs
Byte Programming Time
Chip Programming Time
Erase/Program Endurance
Excludes system level overhead
Minimum 100K cycles guaranteed
1
sec
100K
cycles
Table 12. LATCH UP CHARACTERISTICS
Parameter Description
Min
Max
Input voltage with respect to Vss on all pins except I/O pins
-1.0 V
12.0 V
(including A9 and
)
OE
Input voltage with respect to Vss on all I/O Pins
-1.0 V
Vcc + 1.0 V
100 mA
Vcc Current
-100 mA
Note : These are latch up characteristics and the device should never be put under
these conditions. Refer to Absolute Maximum ratings for the actual operating limits.
Table 13. 32-PIN PLCC PIN CAPACITANCE @ 25°C, 1.0MHz
Parameter Symbol
Parameter Description
Test Setup
= 0
Typ
Max
Unit
C
IN
V
IN
Input Capacitance
4
6
pF
C
V
= 0
OUT
OUT
Output Capacitance
8
8
12
12
pF
pF
C
V
= 0
IN2
IN
Control Pin Capacitance
Table 14. 32-PIN TSOP PIN CAPACITANCE @ 25°C, 1.0MHz
Parameter Symbol
Parameter Description
Test Setup
= 0
Typ
Max
Unit
C
IN
V
IN
Input Capacitance
6
7.5
pF
C
V
= 0
OUT
OUT
Output Capacitance
8.5
7.5
12
9
pF
pF
C
V
= 0
IN2
IN
Control Pin Capacitance
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
25
Rev. A, Issue Date: 2003/10/20