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EN25Q16A-104HIP 参数 Datasheet PDF下载

EN25Q16A-104HIP图片预览
型号: EN25Q16A-104HIP
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位串行闪存与4K字节扇区制服 [16 Megabit Serial Flash Memory with 4Kbyte Uniform Sector]
分类和应用: 闪存
文件页数/大小: 53 页 / 1059 K
品牌: EON [ EON SILICON SOLUTION INC. ]
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EN25Q16A  
The Read Data Bytes (READ) instruction is terminated by driving Chip Select (CS#) High. Chip Select  
(CS#) can be driven High at any time during data output. Any Read Data Bytes (READ) instruction,  
while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the  
cycle that is in progress.  
Figure 11. Read Data Instruction Sequence Diagram  
Read Data Bytes at Higher Speed (FAST_READ) (0Bh)  
The device is first selected by driving Chip Select (CS#) Low. The instruction code for the Read Data  
Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-A0) and a  
dummy byte, each bit being latched-in during the rising edge of Serial Clock (CLK). Then the memory  
contents, at that address, is shifted out on Serial Data Output (DO), each bit being shifted out, at a  
maximum frequency F , during the falling edge of Serial Clock (CLK).  
R
The instruction sequence is shown in Figure 12. The first byte addressed can be at any location. The  
address is automatically incremented to the next higher address after each byte of data is shifted out.  
The whole memory can, therefore, be read with a single Read Data Bytes at Higher Speed  
(FAST_READ) instruction. When the highest address is reached, the address counter rolls over to  
000000h, allowing the read sequence to be continued indefinitely.  
The Read Data Bytes at Higher Speed (FAST_READ) instruction is terminated by driving Chip Select  
(CS#) High. Chip Select (CS#) can be driven High at any time during data output. Any Read Data Bytes  
at Higher Speed (FAST_READ) instruction, while an Erase, Program or Write cycle is in progress, is  
rejected without having any effects on the cycle that is in progress.  
The instruction sequence is shown in Figure 12.1 while using the Enable Quad Peripheral Interface mode  
(EQPI) (38h) command.  
This Data Sheet may be revised by subsequent versions  
or modifications due to changes in technical specifications.  
©2004 Eon Silicon Solution, Inc.,  
www.eonssi.com  
21  
Rev. E, Issue Date: 2011/07/14  
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