ePVP6800
VFD Controller
Bit 4 ~ Bit 6 (C2_PSC0 ~ C2_PSC2) : COUNTER2 prescaler ratio
C2_PSC2
C2_PSC1
C2_PSC0 COUNTER2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
Bit 7 (CNT2S) : COUNTER2 clock source
0 ꢂ16.384kHz
timing = ( 1 /16.384k) * prescaler * (256 – count vaule)
1 ꢂsystem clock
timing = ( 2 / system clock) * prescaler* (256 – count vaule)
7.3.5 IOC9 (PORT9 I/O Control)
a) PAGE 0 (PORT9 I/O Control Register)
Bit 7
IOC97
R/W-1
Bit 6
IOC96
R/W-1
Bit 5
IOC95
R/W-1
Bit 4
IOC94
R/W-1
Bit 3
IOC93
R/W-1
Bit 2
IOC92
R/W-1
Bit 1
IOC91
R/W-1
Bit 0
IOC90
R/W-1
Bit 0 ~ Bit 7 (IOC90 ~ IOC97) : PORT9 (0~7) I/O direction control register
0 ꢂset the relative I/O pin as output
1 ꢂset the relative I/O pin into high impedance
b) PAGE 1 ( Clock Source and Prescaler for COUNTER3 and COUNTER4)
Bit 7
CNT4S C4_PSC2 C4_PSC1 C4_PSC0 CNT3S C3_PSC2 C3_PSC1 C3_PSC0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 0 ~ Bit 2 (C3_PSC0 ~ C3_PSC2) : COUNTER3 prescaler ratio
C3_PSC2
C3_PSC1
C3_PSC0 COUNTER3
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
22 of 47 11. 28.2004 (V1.23)
This specification is subject to change without further notice.
ELAN [ ELAN MICROELECTRONICS CORP ]
