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EM78P5841NP 参数 Datasheet PDF下载

EM78P5841NP图片预览
型号: EM78P5841NP
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 68 页 / 808 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P5840N/41N/42N  
8-Bit Microcontrollers  
won’t reset the ADST bit. In this condition, ADI is deactived. After ADI in IOCE Page 0  
Bit 5 is set, ADI in RE Page 0 Bit 5 will beactivated again.  
To minimize the operating current, all biasing circuits in the A/D module that consume  
DC current, are powered down when the ADPWR bit in IOCB Page 1 Bit 2 register  
is ”0.” When ADPWR bit is ”1,” the A/D converter module is operating.  
1
2
3
4
5
6
7
8
9
10  
Start  
Sample  
ADI (IOCE Page 0 Bit 5 ) =1  
Cleared by software  
ADI (RE Page 0 Bit 5)  
Data  
Figure 7-6 A/D Converter Timing  
Bit 6 (undefined): This bit is not used. However, you must clear this bit to “0” to avoid  
possible error.  
Bit 7 (PWM2) :  
PWM2 interrupt enable bit  
"0" : Disable interrupt  
"1" : Enable interrupt  
7.3.11 IOCF (Interrupt Mask)  
„ Page 0 (Interrupt Mask Register)  
Bit 7  
INT3  
Bit 6  
Bit 5  
Bit 4  
INT1  
Bit 3  
INT0  
Bit 2  
Bit 1  
CNT1  
R/W-0  
Bit 0  
TCIF  
0
-
0
-
0
-
R/W-0  
R/W-0  
R/W-0  
R/W-0  
Bit 0 ~ Bit 1 (TCIF ~ CNT1): Interrupt enable bits  
"0" : Disable interrupt  
"1" : Enable interrupt  
Bit 2 (undefined): This bit is not used. However, this bit must be cleared to “0” to avoid  
unpredicted interrupts to occur.  
Bits 3 ~ Bit 4 (INT0 ~ INT1): Interrupt enable bits  
"0" : Disable interrupt  
"1" : Enable interrupt  
Bit 5 ~ Bit 6 (undefined): These bits are not used. However, these bits must be  
cleared to “0” to avoid unpredicted interrupts to occur.  
Bits 7 (INT3):  
Interrupt enable bit  
"0" : Disable interrupt  
"1" : Enable interrupt  
28 •  
Product Specification (V1.0) 04.25.2006  
(This specification is subject to change without further notice)  
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