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EM78P5841NP 参数 Datasheet PDF下载

EM78P5841NP图片预览
型号: EM78P5841NP
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 68 页 / 808 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P5840N/41N/42N  
8-Bit Microcontrollers  
7.3.10 IOCE (Interrupt Mask)  
„ Page 0 (Interrupt Mask)  
Bit 7  
PWM2  
R/W-0  
Bit 6  
Bit 5  
ADI  
Bit 4  
PWM1  
R/W-0  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
0
-
-
-
-
-
-
-
-
-
R/W-0  
Bit 1 ~ Bit 3 (undefined): These bits are not used.  
Bit 4 (PWM1) : One PWM1 one period for each interrupt mask.  
Bit 5 (ADI) : ADC conversion complete interrupt mask  
"0" : Disable interrupt  
"1" : Enable interrupt  
There are four registers for the AD converter. Use one bit of the interrupt control  
register (IOCE Page 0 Bit 5) to signal an interrupt when the AD conversion is completed.  
The status and control register of AD (IOCB Page 1 and RE Page 0 Bit 5) indicate the  
A/D conversion status or AD control. The AD data register (RB PAGE1) stores the  
result of the AD conversion.  
The ADI bit can be enabled or disabled in the IOCE PAGE 0 register to signal the  
completion of the A/D conversion. The ADI flag is then enabled or disabled in the RE  
register when AD conversion is completed. The ADI flag indicates the end of an AD  
conversion. The AD converter sets the interrupt flag (ADI) in the RE Page 0 register  
when a conversion is completed. The interrupt can be disabled by setting the ADI bit in  
IOCE Page 0 Bit 5 to “0.”  
The AD converter has eight analog input channels (AD1 ~ AD8) multiplexed into one  
sample and hold to AD module. The reference voltage can be driven from the internal  
power. The AD converter itself is a 10-bit successive approximation type and produces  
the last significant 8-bit result in the RB Page 1 and the most significant 2 bits to R7  
Page 1 Bit 4, Bit 5. A conversion is initiated by setting a control bit ADST in IOCB Page  
1 Bit 0. Prior to conversion, the appropriate channel must be selected by setting IN0 ~  
IN2 bits in the RE register. Enough time must be allowed to sample data. Every AD  
data conversion needs 12-clock cycle time. The minimum conversion time required is  
13 µs (73K sample rate). The ADST Bit in IOCB Page 1 Bit 0 must be set to begin a  
conversion.  
It will be automatically reset in the hardware when a conversion is completed. At the  
end of the conversion, the Start bit is cleared and the the AD interrupt is activated if ADI  
in IOCE Page 0 Bit 5 = 1. ADI will be set when the conversion is completed. It can be  
reset in the software.  
If ADI = 0 in IOCE Page 0 Bit 5 and AD starts data conversion by setting ADST(IOCB  
Page 1 Bit 0) = 1, then AD will continue the conversion non-stop and the hardware  
Product Specification (V1.0) 04.25.2006  
(This specification is subject to change without further notice)  
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