EM78P5840N/41N/42N
8-Bit Microcontrollers
Instruction
Cycle
Status
Binary Instruction
Hex
04rr
Mnemonic
Operation
Affected
0 0100 01rr rrrr
0 0100 10rr rrrr
0 0100 11rr rrrr
0 0101 00rr rrrr
0 0101 01rr rrrr
0 0101 10rr rrrr
0 0101 11rr rrrr
MOV R,R
COMA R
COM R
INCA R
INC R
R → R
Z
Z
1
1
04rr
04rr
05rr
05rr
05rr
05rr
/R → A
1
/R → R
R+1 → A
R+1 → R
Z
1
1
Z
1
Z
1
DJZA R
DJZ R
R-1 → A, skip if zero
R-1 → R, skip if zero
None
None
2 if skipped
2 if skipped
R(n) → A(n-1)
0 0110 00rr rrrr
0 0110 01rr rrrr
0 0110 10rr rrrr
0 0110 11rr rrrr
0 0111 00rr rrrr
06rr
06rr
06rr
06rr
07rr
RRCA R
RRC R
C
C
1
1
1
1
1
R(0) → C, C → A(7)
R(n) → R(n-1)
R(0) → C, C → R(7)
R(n) → A(n+1)
R(7) → C, C → A(0)
RLCA R
RLC R
C
R(n) → R(n+1)
R(7) → C, C → R(0)
C
R(0-3) → A(4-7)
R(4-7) → A(0-3)
SWAPA R
None
0 0111 01rr rrrr
0 0111 10rr rrrr
0 0111 11rr rrrr
0 100b bbrr rrrr
0 101b bbrr rrrr
0 110b bbrr rrrr
0 111b bbrr rrrr
07rr
07rr
07rr
0xxx
0xxx
0xxx
0xxx
SWAP R
JZA R
R(0-3) ↔ R(4-7)
R+1 → A, skip if zero
R+1 → R, skip if zero
0 → R(b)
None
None
None
None
None
None
None
1
2 if skipped
2 if skipped
1
JZ R
BC R,b
BS R,b
JBC R,b
JBS R,b
1 → R(b)
1
if R(b)=0, skip
if R(b)=1, skip
2 if skipped
2 if skipped
PC+1 → [SP]
(Page, k) → PC
1 00kk kkkk kkkk
1kkk
CALL k
None
2
1 01kk kkkk kkkk
1 1000 kkkk kkkk
1 1001 kkkk kkkk
1 1010 kkkk kkkk
1 1011 kkkk kkkk
1 1100 kkkk kkkk
1 1101 kkkk kkkk
1kkk
18kk
19kk
1Akk
1Bkk
1Ckk
1Dkk
JMP k
(Page, k) → PC
k → A
None
None
Z
2
1
1
1
1
2
1
MOV A,k
OR A,k
A ∨ k → A
AND A,k
XOR A,k
RETL k
SUB A,k
A & k → A
Z
A ⊕ k → A
Z
k → A, [Top of Stack] → PC
k-A → A
None
Z, C, DC
PC+1 → [SP]
001H → PC
1 1110 0000 0001
1 1110 100k kkkk
1E01
INT
None
1
1
1E8k
1Fkk
PAGE k
ADD A,k
K–>R5(4:0)
None
1
1 1111 kkkk kkkk
k+A → A
Z, C, DC
1
1
One Instruction cycle = Two main CLK
Product Specification (V1.0) 04.25.2006
(This specification is subject to change without further notice)
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