EM78P5840N/41N/42N
8-Bit Microcontrollers
7.4 Instruction Set
The Instruction set has the following features:
1) Every bit of any register can be set, cleared, or tested directly.
2) The I/O register can be regarded as general register. That is, the same instruction
can operate on the I/O register.
Convention:
R = Register designator that specifies which one of the registers (including operation and general purpose
registers) is to be utilized by the instruction.
Bits 6 and 7 in R4 determine the selected register bank.
b = Bit field designator that selects the value for the bit located in register R and which affects the operation.
k = 8 or 10-bit constant or literal value
Instruction
Cycle
Status
Binary Instruction
Hex
0000
Mnemonic
Operation
No Operation
Affected
1
0 0000 0000 0000
0 0000 0000 0001
0 0000 0000 0010
0 0000 0000 0011
0 0000 0000 0100
0 0000 0000 rrrr
0 0000 0001 0000
0 0000 0001 0001
0 0000 0001 0010
NOP
None
C
1
0001
0002
0003
0004
000r
0010
0011
0012
DAA
Decimal Adjust A
A → CONT
1
1
1
1
1
1
1
2
CONTW
SLEP
WDTC
IOW R
ENI
None
T, P
0 → WDT, Stop oscillator
0 → WDT
T, P
A → IOCR
None
None
None
None
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
DISI
RET
[Top of Stack] → PC
Enable Interrupt
0 0000 0001 0011
0013
RETI
None
2
0 0000 0001 0100
0 0000 0001 rrrr
0 0000 0010 0000
0 0000 01rr rrrr
0 0000 1000 0000
0 0000 11rr rrrr
0 0001 00rr rrrr
0 0001 01rr rrrr
0 0001 10rr rrrr
0 0001 11rr rrrr
0 0010 00rr rrrr
0 0010 01rr rrrr
0 0010 10rr rrrr
0014
001r
0020
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
CONTR
IOR R
CONT → A
IOCR → A
R2+A →R2 Bits 9,10, do not clear
A → R
None
1
1
2
1
1
1
1
1
1
1
1
1
1
None
TBL
Z, C, DC
MOV R,A
CLRA
None
0 → A
Z
CLR R
0 → R
Z
SUB A,R
SUB R,A
DECA R
DEC R
OR A,R
OR R,A
AND A,R
R-A → A
Z, C, DC
R-A → R
Z, C, DC
R-1 → A
Z
Z
Z
Z
Z
R-1 → R
A ∨ R → A
A ∨ R → R
A & R → A
0 0010 11rr rrrr
0 0011 00rr rrrr
0 0011 01rr rrrr
0 0011 10rr rrrr
0 0011 11rr rrrr
0 0100 00rr rrrr
02rr
03rr
03rr
03rr
03rr
04rr
AND R,A
XOR A,R
XOR R,A
ADD A,R
ADD R,A
MOV A,R
A & R → R
A ⊕ R → A
A ⊕ R → R
A + R → A
A + R → R
R → A
Z
1
1
1
1
1
1
Z
Z
Z,C, DC
Z,C, DC
Z
30 •
Product Specification (V1.0) 04.25.2006
(This specification is subject to change without further notice)