EM78P458/459
OTP ROM
• Bit 6 (PWM1E): PWM1 enable bit
0 = PWM1 is off (default value), and its related pin carries out the P51 function;
1 = PWM1 is on, and its related pin will be set to output automatically.
• Bit 5 (T2EN): TMR2 enable bit
0 = TMR2 is off (default value).
1 = TMR2 is on.
• Bit 4 (T1EN): TMR1 enable bit
0 = TMR1 is off (default value).
1 = TMR1 is on.
• Bit 3: Bit 2 ( T2P1:T2P0 ): TMR2 clock prescale option bits.
T2P1
T2P0
Prescale
1:2(Default)
1:8
0
0
1
1
0
1
0
1
1:32
1:64
• Bit 1 : Bit 0 ( T1P1:T1P0 ): TMR1 clock prescale option bits.
T1P1
T1P0
Prescale
1:2(Default)
1:8
0
0
1
1
0
1
0
1
1:32
1:64
12. IOC61 ( DT1L: the Least Significant Byte ( Bit 7 ~ Bit 0) of Duty Cycle of
PWM1 )
A specified value keeps the output of PWM1 to stay at high until the value matches with TMR1.
13. IOC71 ( DT1H: the Most Significant Byte ( Bit 1 ~ Bit 0 ) of Duty Cycle of
PWM1 )
7
6
5
4
3
2
-
1
0
CALI1
SIGN1
VOF1[2]
VOF1[1]
VOF1[0]
PWM1[9] PWM1[8]
• Bit 7 (CALI1): Calibration enable bit
0 = Calibration disable;
1 = Calibration enable.
• Bit 6 (SIGN1): Polarity bit of offset voltage
0 = Negative voltage;
1 = Positive voltage.
• Bit 5:Bit 3 (VOF1[2]:VOF1[0]): Offset voltage bits.
• Bit 1:Bit 0 (PWM1[9]:PWM1[8]): The Most Significant Byte of PWM1 Duty Cycle
A specified value keeps the PWM1 output to stay at high until the value matches with TMR1.
This specification is subject to change without prior notice.
19
06.25.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
