EM78P458/459
OTP ROM
001 = IS x 2;
010 = IS x 4;
011 = IS x 8;
100 = IS x 16;
101 = IS x 32;
Legend: IS = the input signal
• Bit 2:Bit 0 (G12 and G10 ): Select the gain of OP1.
000 = IS x 1 (default value);
001 = IS x 2;
010 = IS x 4;
011 = IS x 8;
100 = IS x 16;
101 = IS x 32;
Legend: S = the input signal
5. IOCA0 ( AD-CMPCON ):
7
6
CE
5
COE
4
3
2
1
0
VREFS
IMS2
IMS1
IMS0
CKR1
CKR0
• Bit 7: The input source of the Vref of the ADC.
0 = The Vref of the ADC is connected to Vdd (default value), and the P53/VREF pin carries out the
function of P53;
1 = The Vref of the ADC is connected to P53/VREF.
• Bit 6 (CE): Comparator enable bit
0 = Comparator is off (default value);
1 = Comparator is on.
• Bit 5 ( COE ): Set P57 as the output of the comparator
0 = the comparator acts as an OP if CE=1.
1 = act as a comparator if CE=1.
• Bit4:Bit2 (IMS2:IMS0):
Input Mode Select. ADC configuration definition bit. The following Table describes how to define the
characteristic of each pin of R6.
Table 3 Description of AD Configuration Control Bits
IMS2:IMS0
000
P60
A
P61
D
P62
D
P63
D
P64
D
P65
D
P66
D
P67
D
001
A
A
D
D
D
D
D
D
010
A
A
A
D
D
D
D
D
This specification is subject to change without prior notice.
15
06.25.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
