EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
Period
Duty Cycle
PRD1 = TMR1
DT1 = TMR1
Fig. 6-11 PWM Output Timing
6.8.2 Increment Timer Counter (TMRX: TMR1H/TWR1L, TMR2H
/TWR2L, or TMR3H/TWR3L)
TMRX are ten-bit clock counters with programmable prescalers. They are designed for
the PWM module as baud rate clock generators. TMRX can be read only. If employed,
they can be turned off for power saving by setting the T1EN bit [IOC80<3>], T2EN bit
[IOC90<6>]. or T3EN bit [IOC90<7>] to 0.
6.8.3 PWM Time Period (PRDX : PRD1 or PRD2)
The PWM time period is defined by writing to the PRDX register. When TMRX is equal
to PRDX, the following events occur on the next increment cycle:
ꢀ
ꢀ
ꢀ
TMRX is cleared
The PWMX pin is set to 1
The PWM duty cycle is latched from DT1/DT2/DT3 to DL1/DL2/DL3
NOTE
The PWM output will not be set, if the duty cycle is 0
ꢀ
The PWMXIF pin is set to 1
The following formula describes how to calculate the PWM time period:
PERIOD = (PRDX + 1) * 4 * (1/Fosc) * CLKS/2 * (TMRX prescale value )
Example:
PRDX=49; Fosc=4MHz; CLKS bit of Code Option Register =0 (2
oscillator periods); TMRX(0,0,0)=1:2, then PERIOD=(49 + 1) * 4 *
(1/4M) * 2/2 * 2 =100us
Product Specification (V1.0) 06.23.2005
• 51
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
