EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
6.7.4 AD Conversion Time
CKR0 and CKR1 select the conversion time (Tct), in terms of instruction cycles. This
allows the MCU to run at the maximum frequency without sacrificing the AD conversion
accuracy. For the EM78P417/8/9N, the conversion time per bit is about 4µs. The table
below shows the relationship between Tct and the maximum operating frequencies.
Operation Max. Operation Max. Conversion
CKR0:CKR1
Max. Conversion Rate
Mode
Frequency
1 MHz
4MHz
16MHz
-
Rate/Bit
00
01
10
11
Fsco/4
250kHz (4us) 15*4us=60us(16.7kHz)
250kHz (4us) 15*4us=60us(16.7kHz)
250kHz( 4us) 15*4us=60us(16.7kHz)
14kHz (71us) 15*71us=1065us(0.938kHz)
Fsco/16
Fsco/64
Internal RC
NOTE
■ Pin not used as an analog input pin can be used as regular input or output pin.
■ During conversion, do not perform output instruction to maintain precision for all of
the pins.
6.7.5 ADC Operation during Sleep Mode
In order to obtain a more accurate ADC value and reduce power consumption, the AD
conversion remains operational during sleep mode. As the SLEP instruction is
executed, all the MCU operations will stop except for the Oscillator, TCC, TIMER1,
TIMER2, TIMER3, and AD conversion.
The AD Conversion is considered completed as determined by:
1. ADRUN bit of R9 register is cleared (“0” value)
2. Wake-up from AD conversion (where it remains in operation during sleep mode)
The results are fed into the ADDATA, ADDATA1H, and ADDATA1L registers when the
conversion is completed. If the ADWE is enabled, the device will wake up. Otherwise,
the AD conversion will be shut off, no matter what the status of ADPD bit is.
6.7.6 Programming Process/Considerations
6.7.6.1 Programming Process
Follow these steps to obtain data from the ADC:
1. Write to the eight bits (ADE7:ADE0) on the R8 (AISR) register to define the
characteristics of R6 (digital I/O, analog channels, or voltage reference pin)
2. Write to the R9/ADCON register to configure AD module:
a) Select ADC input channel ( ADIS2:ADIS0 )
b) Define AD conversion clock rate ( CKR1:CKR0 )
c) Select the VREFS input source of the ADC
d) Set the ADPD bit to 1 to begin sampling
Product Specification (V1.0) 06.23.2005
• 47
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
