EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
6.9.2 Function Description
The following figure shows the TMRX block diagram followed by descriptions of its
signals and blocks:
1:2
1:4
1:8
Fosc
To PWM1IF
1:16
1:32
1:64
1:128
1:256
MUX
reset
Period
Match
TMR1X
Comparator
T1P2 T1P1 T1P0 T1EN
PRD1
Data Bus
Data Bus
PRD2
T2P2 T2P1 T2P0 T2EN
Comparator
reset
Period
Match
TMR2X
1:2
1:4
Fosc
1:8
1:16
1:32
MUX
1:64
1:128
1:256
To PWM2IF
*TMR1X = TMR1H + TMR1L;
*TMR2X = TMR2H + TMR2L;
*TMR3X = TMR3H + TMR3L
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
Fosc
To PWM13F
MUX
reset
Period
Match
TMR3X
Comparator
T3P2 T3P1 T3P0 T3EN
PRD3
Data Bus
Data Bus
Fig. 6-12 TMRX Block Diagram
Fosc: Input clock.
Prescaler (T1P2, T1P1 and T1P0 / T2P2, T2P1 and T2P0 / T3P2, T3P1 and T3P0):
The options 1:2, 1:4, 1:8, 1:16, 1:32, 1:64, 1:128, and 1:256 are defined by
TMRX. It is cleared when any type of reset occurs.
TMR1X, TMR2X and TMR3X (TMR1H/TWR1L, TMR2H/TMR2L, & TMR3H/TMR3L):
Timer X register; TMRX is increased until it matches with PRDX, and then is
reset to 1 (default valve).
Product Specification (V1.0) 06.23.2005
• 53
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
