EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
6.7.1 ADC Control Register (AISR/R8, ADCON/R9, ADOC/RA)
6.7.1.1 R8 (AISR: ADC Input Select Register)
7
6
ADE7
0
5
ADE6
0
4
ADE5
0
3
ADE4
0
2
ADE3
0
1
ADE2
0
0
ADE1
0
SYMBOL
*Init_Value
AISR register defines the Port 6 pins as analog inputs or as digital I/O, individually.
Bit 7 (ADE7 ): AD converter enable bit of P67 pin
0 = Disable ADC7, P67 acts as I/O pin
1 = Enable ADC7 acts as analog input pin
Bit 6 (ADE6 ): AD converter enable bit of P66 pin
0 = Disable ADC6, P66 acts as I/O pin
1 = Enable ADC6 acts as analog input pin
Bit 5 (ADE5 ): AD converter enable bit of P65 pin
0 = Disable ADC5, P65 acts as I/O pin
1 = Enable ADC5 acts as analog input pin
Bit 4 (ADE4 ): AD converter enable bit of P64 pin
0 = Disable ADC4, P64 acts as I/O pin
1 = Enable ADC4 acts as analog input pin
Bit 3 (ADE3 ): AD converter enable bit of P63 pin
0 = Disable ADC3, P63 acts as I/O pin
1 = Enable ADC3 acts as analog input pin
Bit 2 (ADE2 ): AD converter enable bit of P62 pin
0 = Disable ADC2, P63 acts as I/O pin
1 = Enable ADC2 acts as analog input pin
Bit 1 (ADE1 ): AD converter enable bit of P61 pin
0 = Disable ADC1, P61 acts as I/O pin
1 = Enable ADC1 acts as analog input pin
Product Specification (V1.0) 06.23.2005
• 43
(This specification is subject to change without further notice)