EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
PCRD
P
R
Q
D
CLK
PCWR
_
Q
C
L
P
R
PORT
D
IOD
Q
CLK
PDWR
_
Q
C
L
PDRD
M
U
X
0
1
NOTE: Pull-high and Open-drain are not shown in the figure.
Fig. 6-3 I/O Port and I/O Control Register Circuit for Port 5 and Port7
PCRD
P
R
Q
D
CLK
PCWR
_
Q
C
L
P50, /INT
PORT
P
R
Q
D
IOD
CLK
_
Q
PDWR
C
L
Bit 6 of IOCE0
M
U
X
0
1
P
R
D
Q
CLK
_
Q
C
L
PDRD
TI 0
INT
NOTE: Pull-high and Open-drain are not shown in the figure.
Fig. 6-4 I/O Port and I/O Control Register Circuit for P50(/INT)
28 •
Product Specification (V1.0) 06.23.2005
(This specification is subject to change without further notice)