EM78P350N
8-Bit Microprocessor with OTP ROM
Bit 4 (TE):
TCC signal edge
0 = increment if the transition from low to high takes place on the TCC
pin
1 = increment if the transition from high to low takes place on the TCC
pin.
Bit 3 (PSTE): Prescaler enable bit for TCC
0 = prescaler disable bit. TCC rate is 1:1
1 = prescaler enable bit. TCC rate is set as Bit 2 ~ Bit 0.
Bit 2 ~ Bit 0 (PST2 ~ PST0): TCC prescaler bits
PST2
PST1
PST0
TCC Rate
0
0
0
1:2
1:4
0
0
0
1
1
1
0
1
1
0
0
1
1
0
1
0
1
0
1:8
1:16
1:32
1:64
1:128
1
1
1
1:256
Note: Tcc time-out period [1/Fosc x prescaler x 256 (Tcc cnt) x 1 (CLK=2)]
Tcc time-out period [1/Fosc x prescaler x 256 (Tcc cnt) x 2 (CLK=4)]
6.2.3 IOC5 ~ IOC8 (I/O Port Control Register)
0 = defines the relative I/O pin as outpu
1 = puts the relative I/O pin into high impedance
IOC5, IOC6, IOC7, and IOC8 registers are all readable and writable.
6.2.4 IOC9 (T4CON: Timer 4 Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPIE
SPIF
TM4IF
“0”
TM4E
TM4P1 TM4P0
−
Bit 7(SPIIE): SPI Interrupt enable bit
0 = Disable SPI interrupt
1 = Enable SPI interrupt
Bit 6 (SPIIF): SPI interrupt flag. Set by data transmission complete, flag is cleared by
software.
Bit 4 (TM4IF) Timer 4 interrupt flag. Set by the comparator during Timer 4 application,
flag is cleared by software.
Bit 3: Unimplemented, read as ‘0’
Bit 2 (TM4E): Timer 4 Function Enable bit
0 = Disable Timer 4 function as default
1 = Enable Timer 4 function
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
