EM78P350N
8-Bit Microprocessor with OTP ROM
6.1.37 Bank 3 R6 (Pull-Low Control Register 2)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/PL67
/PL66
/PL65
/PL64
/PL63
/PL62
/PL61
/PL60
Bank 3 R6 register is both readable and writable.
Bit 7 (/PL67): Control bit is used to enable the pull-high of the P67 pin.
0 = Enable pull-low output
1 = Disable pull-low output
Bit 6 (/PL66): Control bit used to enable the pull-low function of the P66 output pin.
Bit 5 (/PL65): Control bit used to enable the pull-low function of the P65 output pin.
Bit 4 (/PL64): Control bit used to enable the pull-low function of the P64 output pin.
Bit 3 (/PL63): Control bit used to enable the pull-low function of the P63 output pin.
Bit 2 (/PL62): Control bit used to enable the pull-low function of the P62 output pin.
Bit 1 (/PL61): Control bit used to enable the pull-low of function the P61 output pin.
Bit 0 (/PL60): Control bit used to enable the pull-low of function the P60 output pin.
6.1.38 Bank3 R7 (Pull-Low Control Register 3)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/PL77
/PL76
/PL75
/PL74
/PL73
/PL72
/PL71
/PL70
Bank 3 R7 register is both readable and writable.
Bit 7 (/PL77): Control bit is used to enable the pull-high of the P77 pin.
0 = Enable pull-low output
1 = Disable pull-low output
Bit 6 (/PL76): Control bit used to enable the pull-low function of the P76 output pin.
Bit 5 (/PL75): Control bit used to enable the pull-low function of the P75 output pin.
Bit 4 (/PL74): Control bit used to enable the pull-low function of the P74 output pin.
Bit 3 (/PL73): Control bit used to enable the pull-low function of the P73 output pin.
Bit 2 (/PL72): Control bit used to enable the pull-low function of the P72 output pin.
Bit 1 (/PL71): Control bit used to enable the pull-low function of the P71 output pin.
Bit 0 (/PL70): Control bit used to enable the pull-low function of the P70 output pin.
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
• 25